[PATCH 1/2] lib: add fwts_log_info_simp_int to printing integers
Alex Hung
alex.hung at canonical.com
Mon Jan 11 18:35:22 UTC 2021
Signed-off-by: Alex Hung <alex.hung at canonical.com>
---
src/acpi/aspt/aspt.c | 12 +-
src/acpi/bert/bert.c | 16 +-
src/acpi/bgrt/bgrt.c | 12 +-
src/acpi/boot/boot.c | 22 +--
src/acpi/dbg2/dbg2.c | 34 ++--
src/acpi/dbgp/dbgp.c | 12 +-
src/acpi/drtm/drtm.c | 34 ++--
src/acpi/ecdt/ecdt.c | 24 +--
src/acpi/einj/einj.c | 12 +-
src/acpi/erst/erst.c | 29 ++--
src/acpi/facs/facs.c | 18 +-
src/acpi/fpdt/fpdt.c | 14 +-
src/acpi/hest/hest.c | 316 ++++++++++++++++++------------------
src/acpi/hmat/hmat.c | 60 +++----
src/acpi/iort/iort.c | 110 ++++++-------
src/acpi/lpit/lpit.c | 36 ++--
src/acpi/mchi/mchi.c | 30 ++--
src/acpi/mpst/mpst.c | 48 +++---
src/acpi/msct/msct.c | 12 +-
src/acpi/msdm/msdm.c | 8 +-
src/acpi/nfit/nfit.c | 130 +++++++--------
src/acpi/pcc/pcc.c | 64 ++++----
src/acpi/pcct/pcct.c | 118 +++++++-------
src/acpi/pdtt/pdtt.c | 8 +-
src/acpi/pmtt/pmtt.c | 42 ++---
src/acpi/pptt/pptt.c | 50 +++---
src/acpi/sdev/sdev.c | 32 ++--
src/acpi/slic/slic.c | 20 +--
src/acpi/slit/slit.c | 2 +-
src/acpi/spmi/spmi.c | 34 ++--
src/acpi/srat/srat.c | 94 +++++------
src/acpi/stao/stao.c | 2 +-
src/acpi/tcpa/tcpa.c | 56 +++----
src/acpi/tpm2/tpm2.c | 8 +-
src/acpi/uefi/uefi.c | 6 +-
src/acpi/waet/waet.c | 2 +-
src/acpi/wpbt/wpbt.c | 10 +-
src/acpi/wsmt/wsmt.c | 2 +-
src/acpi/xenv/xenv.c | 8 +-
src/dmi/dmicheck/dmicheck.c | 38 ++---
src/lib/include/fwts_log.h | 4 +
src/lib/src/fwts_log.c | 27 +++
42 files changed, 816 insertions(+), 800 deletions(-)
diff --git a/src/acpi/aspt/aspt.c b/src/acpi/aspt/aspt.c
index f7c48b94..9b92214c 100644
--- a/src/acpi/aspt/aspt.c
+++ b/src/acpi/aspt/aspt.c
@@ -44,14 +44,10 @@ static int aspt_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "ASPT Table:");
- fwts_log_info_verbatim(fw, " SPTT Start Address: 0x%8.8" PRIx32,
- aspt->sptt_addr_start);
- fwts_log_info_verbatim(fw, " SPTT End Address: 0x%8.8" PRIx32,
- aspt->sptt_addr_end);
- fwts_log_info_verbatim(fw, " AMRT Start Address: 0x%8.8" PRIx32,
- aspt->amrt_addr_start);
- fwts_log_info_verbatim(fw, " AMRT End Address: 0x%8.8" PRIx32,
- aspt->amrt_addr_end);
+ fwts_log_info_simp_int(fw, " SPTT Start Address: ", aspt->sptt_addr_start);
+ fwts_log_info_simp_int(fw, " SPTT End Address: ", aspt->sptt_addr_end);
+ fwts_log_info_simp_int(fw, " AMRT Start Address: ", aspt->amrt_addr_start);
+ fwts_log_info_simp_int(fw, " AMRT End Address: ", aspt->amrt_addr_end);
fwts_log_nl(fw);
/*
diff --git a/src/acpi/bert/bert.c b/src/acpi/bert/bert.c
index 0196fb5f..45743ee0 100644
--- a/src/acpi/bert/bert.c
+++ b/src/acpi/bert/bert.c
@@ -40,8 +40,8 @@ static int bert_test1(fwts_framework *fw)
size_t len;
fwts_log_info_verbatim(fw, "Boot Error Record Table:");
- fwts_log_info_verbatim(fw, " Error Region Length 0x%8.8" PRIx32, bert->boot_error_region_length);
- fwts_log_info_verbatim(fw, " Error Region 0x%16.16" PRIx64, bert->boot_error_region);
+ fwts_log_info_simp_int(fw, " Error Region Length ", bert->boot_error_region_length);
+ fwts_log_info_simp_int(fw, " Error Region ", bert->boot_error_region);
fwts_log_nl(fw);
/* Sanity check length */
@@ -98,14 +98,10 @@ static int bert_test1(fwts_framework *fw)
(region->block_status >> 3) & 1);
fwts_log_info_verbatim(fw, " Block Status: bit [13:4] 0x%" PRIx32 " (Error Data Entry Count)",
(region->block_status >> 4) & 0x3ff);
- fwts_log_info_verbatim(fw, " Raw Data Offset: 0x%8.8" PRIx32,
- region->raw_data_offset);
- fwts_log_info_verbatim(fw, " Raw Data Length: 0x%8.8" PRIx32,
- region->raw_data_length);
- fwts_log_info_verbatim(fw, " Data Length: 0x%8.8" PRIx32,
- region->data_length);
- fwts_log_info_verbatim(fw, " Error Severity 0x%8.8" PRIx32,
- region->error_severity);
+ fwts_log_info_simp_int(fw, " Raw Data Offset: ", region->raw_data_offset);
+ fwts_log_info_simp_int(fw, " Raw Data Length: ", region->raw_data_length);
+ fwts_log_info_simp_int(fw, " Data Length: ", region->data_length);
+ fwts_log_info_simp_int(fw, " Error Severity ", region->error_severity);
/* Sanity check raw data fields */
if (region->raw_data_offset >
diff --git a/src/acpi/bgrt/bgrt.c b/src/acpi/bgrt/bgrt.c
index 0df87d3b..8777bb27 100644
--- a/src/acpi/bgrt/bgrt.c
+++ b/src/acpi/bgrt/bgrt.c
@@ -39,12 +39,12 @@ static int bgrt_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "BGRT Boot Graphics Resource Table:");
- fwts_log_info_verbatim(fw, " Version: 0x%4.4" PRIx16, bgrt->version);
- fwts_log_info_verbatim(fw, " Status: 0x%2.2" PRIx8, bgrt->status);
- fwts_log_info_verbatim(fw, " Image Type: 0x%2.2" PRIx8, bgrt->image_type);
- fwts_log_info_verbatim(fw, " Image Memory Address: 0x%16.16" PRIx64, bgrt->image_addr);
- fwts_log_info_verbatim(fw, " Image Offset X: 0x%8.8" PRIx32, bgrt->image_offset_x);
- fwts_log_info_verbatim(fw, " Image Offset Y: 0x%8.8" PRIx32, bgrt->image_offset_y);
+ fwts_log_info_simp_int(fw, " Version: ", bgrt->version);
+ fwts_log_info_simp_int(fw, " Status: ", bgrt->status);
+ fwts_log_info_simp_int(fw, " Image Type: ", bgrt->image_type);
+ fwts_log_info_simp_int(fw, " Image Memory Address: ", bgrt->image_addr);
+ fwts_log_info_simp_int(fw, " Image Offset X: ", bgrt->image_offset_x);
+ fwts_log_info_simp_int(fw, " Image Offset Y: ", bgrt->image_offset_y);
fwts_acpi_fixed_value_check(fw, LOG_LEVEL_MEDIUM, "BGRT", "Version", bgrt->version, 1, &passed);
fwts_acpi_reserved_bits_check(fw, "BGRT", "BGRT Status", bgrt->status, sizeof(bgrt->status), 3, 7, &passed);
diff --git a/src/acpi/boot/boot.c b/src/acpi/boot/boot.c
index 9a02f192..68bdd599 100644
--- a/src/acpi/boot/boot.c
+++ b/src/acpi/boot/boot.c
@@ -62,10 +62,10 @@ static int boot_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "BOOT Table:");
- fwts_log_info_verbatim(fw, " CMOS Index: 0x%2.2" PRIx8, boot->cmos_index);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, boot->reserved[0]);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, boot->reserved[1]);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, boot->reserved[2]);
+ fwts_log_info_simp_int(fw, " CMOS Index: ", boot->cmos_index);
+ fwts_log_info_simp_int(fw, " Reserved: ", boot->reserved[0]);
+ fwts_log_info_simp_int(fw, " Reserved: ", boot->reserved[1]);
+ fwts_log_info_simp_int(fw, " Reserved: ", boot->reserved[2]);
fwts_log_nl(fw);
/*
@@ -80,13 +80,13 @@ static int boot_test1(fwts_framework *fw)
fwts_cmos_read(boot->cmos_index, &val);
- fwts_log_info_verbatim(fw, "CMOS value: Bit 0x%" PRIx8, val);
- fwts_log_info_verbatim(fw, " PnP OS [0] 0x%" PRIx8, (val >> 0) & 1);
- fwts_log_info_verbatim(fw, " Booting Bit [1] 0x%" PRIx8, (val >> 1) & 1);
- fwts_log_info_verbatim(fw, " DIAG Bit [2] 0x%" PRIx8, (val >> 2) & 1);
- fwts_log_info_verbatim(fw, " SUPPRESSBOOTDISPLAY [3] 0x%" PRIx8, (val >> 3) & 1);
- fwts_log_info_verbatim(fw, " RESERVED [4-6] 0x%" PRIx8, (val >> 4) & 7);
- fwts_log_info_verbatim(fw, " PARITY [7] 0x%" PRIx8, (val >> 7) & 1);
+ fwts_log_info_simp_int(fw, "CMOS value: Bit ", val);
+ fwts_log_info_simp_int(fw, " PnP OS [0] ", (val >> 0) & 1);
+ fwts_log_info_simp_int(fw, " Booting Bit [1] ", (val >> 1) & 1);
+ fwts_log_info_simp_int(fw, " DIAG Bit [2] ", (val >> 2) & 1);
+ fwts_log_info_simp_int(fw, " SUPPRESSBOOTDISPLAY [3] ", (val >> 3) & 1);
+ fwts_log_info_simp_int(fw, " RESERVED [4-6] ", (val >> 4) & 7);
+ fwts_log_info_simp_int(fw, " PARITY [7] ", (val >> 7) & 1);
/* Ignore doing parity check sum */
}
done:
diff --git a/src/acpi/dbg2/dbg2.c b/src/acpi/dbg2/dbg2.c
index 4fa4d67c..443cfd87 100644
--- a/src/acpi/dbg2/dbg2.c
+++ b/src/acpi/dbg2/dbg2.c
@@ -154,8 +154,8 @@ static int dbg2_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "DBG2 Table:");
- fwts_log_info_verbatim(fw, " Info Offset: 0x%8.8" PRIx32, dbg2->info_offset);
- fwts_log_info_verbatim(fw, " Info Count: 0x%8.8" PRIx32, dbg2->info_count);
+ fwts_log_info_simp_int(fw, " Info Offset: ", dbg2->info_offset);
+ fwts_log_info_simp_int(fw, " Info Count: ", dbg2->info_count);
fwts_log_nl(fw);
total_size = dbg2->info_offset +
@@ -244,20 +244,20 @@ static int dbg2_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "DBG2 Info Structure %" PRIu32 ":", i);
- fwts_log_info_verbatim(fw, " Revision: 0x%2.2" PRIx8, info->revision);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, info->length);
- fwts_log_info_verbatim(fw, " Number of Registers 0x%2.2" PRIx8, info->number_of_regs);
- fwts_log_info_verbatim(fw, " Namespace String Length: 0x%4.4" PRIx16, info->namespace_length);
- fwts_log_info_verbatim(fw, " Namespace String Offset: 0x%4.4" PRIx16, info->namespace_offset);
- fwts_log_info_verbatim(fw, " OEM Data Length: 0x%4.4" PRIx16, info->oem_data_length);
- fwts_log_info_verbatim(fw, " OEM Data Offset: 0x%4.4" PRIx16, info->oem_data_offset);
+ fwts_log_info_simp_int(fw, " Revision: ", info->revision);
+ fwts_log_info_simp_int(fw, " Length: ", info->length);
+ fwts_log_info_simp_int(fw, " Number of Registers ", info->number_of_regs);
+ fwts_log_info_simp_int(fw, " Namespace String Length: ", info->namespace_length);
+ fwts_log_info_simp_int(fw, " Namespace String Offset: ", info->namespace_offset);
+ fwts_log_info_simp_int(fw, " OEM Data Length: ", info->oem_data_length);
+ fwts_log_info_simp_int(fw, " OEM Data Offset: ", info->oem_data_offset);
fwts_log_info_verbatim(fw, " Port Type: 0x%4.4" PRIx16 " (%s)", info->port_type,
port ? port : "(Reserved)");
fwts_log_info_verbatim(fw, " Port Subtype: 0x%4.4" PRIx16 " (%s)", info->port_subtype,
subport ? subport : "(Reserved)");
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, info->reserved);
- fwts_log_info_verbatim(fw, " Base Address Offset: 0x%4.4" PRIx16, info->base_address_offset);
- fwts_log_info_verbatim(fw, " Address Size Offset: 0x%4.4" PRIx16, info->address_size_offset);
+ fwts_log_info_simp_int(fw, " Reserved: ", info->reserved);
+ fwts_log_info_simp_int(fw, " Base Address Offset: ", info->base_address_offset);
+ fwts_log_info_simp_int(fw, " Address Size Offset: ", info->address_size_offset);
fwts_log_nl(fw);
fwts_acpi_fixed_value_check(fw, LOG_LEVEL_HIGH, "DBG2", "Info Structure Revision", info->revision, 0, &passed);
@@ -332,11 +332,11 @@ static int dbg2_test1(fwts_framework *fw)
uint32_t *addrsize = (uint32_t *)(table->data + offset + info->address_size_offset);
for (j = 0; j < info->number_of_regs; j++, gas++, addrsize++) {
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, gas->address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, gas->register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, gas->register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, gas->access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, gas->address);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", gas->address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", gas->register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", gas->register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", gas->access_width);
+ fwts_log_info_simp_int(fw, " Address ", gas->address);
fwts_log_nl(fw);
if (*addrsize == 0) {
diff --git a/src/acpi/dbgp/dbgp.c b/src/acpi/dbgp/dbgp.c
index c3c447fa..85025e90 100644
--- a/src/acpi/dbgp/dbgp.c
+++ b/src/acpi/dbgp/dbgp.c
@@ -63,13 +63,13 @@ static int dbgp_test1(fwts_framework *fw)
fwts_log_info_verbatim(fw, "DBGP Table:");
fwts_log_info_verbatim(fw, " Interface Type 0x%2.2" PRIx8 " (%s)",
dbgp->interface_type, interface_type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, reserved);
+ fwts_log_info_simp_int(fw, " Reserved: " , reserved);
fwts_log_info_verbatim(fw, " Base Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, dbgp->base_address.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, dbgp->base_address.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, dbgp->base_address.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, dbgp->base_address.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, dbgp->base_address.address);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", dbgp->base_address.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", dbgp->base_address.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", dbgp->base_address.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", dbgp->base_address.access_width);
+ fwts_log_info_simp_int(fw, " Address ", dbgp->base_address.address);
fwts_log_nl(fw);
if (dbgp->interface_type > 2) {
diff --git a/src/acpi/drtm/drtm.c b/src/acpi/drtm/drtm.c
index 56a4066b..ff90fc58 100644
--- a/src/acpi/drtm/drtm.c
+++ b/src/acpi/drtm/drtm.c
@@ -44,22 +44,22 @@ static int drtm_test1(fwts_framework *fw)
uint32_t i;
fwts_log_info_verbatim(fw, "DRTM D-RTM Resources Table:");
- fwts_log_info_verbatim(fw, " DL_Entry_Base: 0x%16.16" PRIx64, drtm->entry_base_address);
- fwts_log_info_verbatim(fw, " DL_Entry_Length: 0x%16.16" PRIx64, drtm->entry_length);
- fwts_log_info_verbatim(fw, " DL_Entry32: 0x%8.8" PRIx32, drtm->entry_address32);
- fwts_log_info_verbatim(fw, " DL_Entry64: 0x%16.16" PRIx64, drtm->entry_address64);
- fwts_log_info_verbatim(fw, " DLME_Exit: 0x%16.16" PRIx64, drtm->exit_address);
- fwts_log_info_verbatim(fw, " Log_Area_Start: 0x%16.16" PRIx64, drtm->log_area_address);
- fwts_log_info_verbatim(fw, " Log_Area_Length: 0x%8.8" PRIx32, drtm->log_area_length);
- fwts_log_info_verbatim(fw, " Architecture_Dependent: 0x%16.16" PRIx64, drtm->arch_dependent_address);
- fwts_log_info_verbatim(fw, " DRT_Flags: 0x%8.8" PRIx32, drtm->flags);
+ fwts_log_info_simp_int(fw, " DL_Entry_Base: ", drtm->entry_base_address);
+ fwts_log_info_simp_int(fw, " DL_Entry_Length: ", drtm->entry_length);
+ fwts_log_info_simp_int(fw, " DL_Entry32: ", drtm->entry_address32);
+ fwts_log_info_simp_int(fw, " DL_Entry64: ", drtm->entry_address64);
+ fwts_log_info_simp_int(fw, " DLME_Exit: ", drtm->exit_address);
+ fwts_log_info_simp_int(fw, " Log_Area_Start: ", drtm->log_area_address);
+ fwts_log_info_simp_int(fw, " Log_Area_Length: ", drtm->log_area_length);
+ fwts_log_info_simp_int(fw, " Architecture_Dependent: ", drtm->arch_dependent_address);
+ fwts_log_info_simp_int(fw, " DRT_Flags: ", drtm->flags);
fwts_acpi_reserved_bits_check(fw, "DRTM", "DRT_Flags", drtm->flags, sizeof(drtm->flags), 4, 31, &passed);
fwts_log_nl(fw);
offset = sizeof(fwts_acpi_table_drtm);
drtm_vtl = (fwts_acpi_table_drtm_vtl *) (table->data + offset);
- fwts_log_info_verbatim(fw, " VTL_Length: 0x%8.8" PRIx32, drtm_vtl->validated_table_count);
+ fwts_log_info_simp_int(fw, " VTL_Length: ", drtm_vtl->validated_table_count);
offset += sizeof(drtm_vtl->validated_table_count);
if (drtm->header.length < offset + sizeof(uint64_t) * drtm_vtl->validated_table_count) {
@@ -70,14 +70,14 @@ static int drtm_test1(fwts_framework *fw)
}
for (i = 0; i < drtm_vtl->validated_table_count; i++) {
- fwts_log_info_verbatim(fw, " Validated_Tables: 0x%16.16" PRIx64, drtm_vtl->validated_tables[i]);
+ fwts_log_info_simp_int(fw, " Validated_Tables: ", drtm_vtl->validated_tables[i]);
offset += sizeof(drtm_vtl->validated_tables[i]);
}
fwts_log_nl(fw);
drtm_rtl = (fwts_acpi_table_drtm_rtl *) (table->data + offset);
- fwts_log_info_verbatim(fw, " RL_Length: 0x%8.8" PRIx32, drtm_rtl->resource_count);
+ fwts_log_info_simp_int(fw, " RL_Length: ", drtm_rtl->resource_count);
offset += sizeof(drtm_rtl->resource_count);
if (drtm->header.length < offset + sizeof(fwts_acpi_drtm_resource) * drtm_rtl->resource_count) {
@@ -95,9 +95,9 @@ static int drtm_test1(fwts_framework *fw)
((uint64_t) resource->size[4] << 32) + ((uint64_t) resource->size[5] << 40) +
((uint64_t) resource->size[6] << 48);
- fwts_log_info_verbatim(fw, " Resource Size: 0x%16.16" PRIx64, size);
- fwts_log_info_verbatim(fw, " Resource Type: 0x%2.2" PRIx8, resource->type);
- fwts_log_info_verbatim(fw, " Resource Address: 0x%16.16" PRIx64, resource->address);
+ fwts_log_info_simp_int(fw, " Resource Size: ", size);
+ fwts_log_info_simp_int(fw, " Resource Type: ", resource->type);
+ fwts_log_info_simp_int(fw, " Resource Address: ", resource->address);
if (resource->type & 0x7C) {
passed = false;
@@ -112,7 +112,7 @@ static int drtm_test1(fwts_framework *fw)
}
drtm_dps = (fwts_acpi_table_drtm_dps *) (table->data + offset);
- fwts_log_info_verbatim(fw, " DPS_Length: 0x%8.8" PRIx32, drtm_dps->dps_id_length);
+ fwts_log_info_simp_int(fw, " DPS_Length: ", drtm_dps->dps_id_length);
if (drtm->header.length < offset + sizeof(fwts_acpi_table_drtm_dps)) {
fwts_failed(fw, LOG_LEVEL_HIGH,
@@ -122,7 +122,7 @@ static int drtm_test1(fwts_framework *fw)
}
for (i = 0; i < sizeof(drtm_dps->dps_id); i++) {
- fwts_log_info_verbatim(fw, " DLME Platform Id: 0x%2.2" PRIx8, drtm_dps->dps_id[i]);
+ fwts_log_info_simp_int(fw, " DLME Platform Id: ", drtm_dps->dps_id[i]);
}
fwts_log_nl(fw);
diff --git a/src/acpi/ecdt/ecdt.c b/src/acpi/ecdt/ecdt.c
index 0cf81893..58e2efa3 100644
--- a/src/acpi/ecdt/ecdt.c
+++ b/src/acpi/ecdt/ecdt.c
@@ -99,19 +99,19 @@ static int ecdt_test1(fwts_framework *fw)
/* Now we have got some sane data, dump the ECDT */
fwts_log_info_verbatim(fw, "ECDT Embedded Controller Boot Resources Table:");
fwts_log_info_verbatim(fw, " EC_CONTROL:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, ecdt->ec_control.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, ecdt->ec_control.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, ecdt->ec_control.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, ecdt->ec_control.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, ecdt->ec_control.address);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", ecdt->ec_control.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", ecdt->ec_control.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", ecdt->ec_control.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", ecdt->ec_control.access_width);
+ fwts_log_info_simp_int(fw, " Address ", ecdt->ec_control.address);
fwts_log_info_verbatim(fw, " EC_DATA:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, ecdt->ec_data.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, ecdt->ec_data.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, ecdt->ec_data.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, ecdt->ec_data.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, ecdt->ec_data.address);
- fwts_log_info_verbatim(fw, " UID: 0x%8.8" PRIx32, ecdt->uid);
- fwts_log_info_verbatim(fw, " GPE_BIT: 0x%2.2" PRIx8, ecdt->gpe_bit);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", ecdt->ec_data.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", ecdt->ec_data.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", ecdt->ec_data.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", ecdt->ec_data.access_width);
+ fwts_log_info_simp_int(fw, " Address ", ecdt->ec_data.address);
+ fwts_log_info_simp_int(fw, " UID: ", ecdt->uid);
+ fwts_log_info_simp_int(fw, " GPE_BIT: ", ecdt->gpe_bit);
fwts_log_info_verbatim(fw, " EC_ID: '%s'", (const char *)ecdt->ec_id);
fwts_log_nl(fw);
diff --git a/src/acpi/einj/einj.c b/src/acpi/einj/einj.c
index de303f65..72b5cc94 100644
--- a/src/acpi/einj/einj.c
+++ b/src/acpi/einj/einj.c
@@ -42,14 +42,10 @@ static int einj_test1(fwts_framework *fw)
((uint32_t) einj->reserved[2] << 16);
fwts_log_info_verbatim(fw, "EINJ Error Injection Table:");
- fwts_log_info_verbatim(fw, " Injection Header Size: 0x%8.8" PRIx32,
- einj->header_size);
- fwts_log_info_verbatim(fw, " Injection Flags: 0x%8.8" PRIx32,
- einj->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32,
- reserved);
- fwts_log_info_verbatim(fw, " Injection Entry Count: 0x%8.8" PRIx32,
- einj->count);
+ fwts_log_info_simp_int(fw, " Injection Header Size: ", einj->header_size);
+ fwts_log_info_simp_int(fw, " Injection Flags: ", einj->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved);
+ fwts_log_info_simp_int(fw, " Injection Entry Count: ", einj->count);
fwts_acpi_reserved_bits_check(fw, "EINJ", "Injection Flags", einj->flags, sizeof(einj->flags), 0, 31, &passed);
fwts_acpi_reserved_zero_check(fw, "EINJ", "Reserved", reserved, sizeof(reserved), &passed);
diff --git a/src/acpi/erst/erst.c b/src/acpi/erst/erst.c
index 0f51503c..3a03090c 100644
--- a/src/acpi/erst/erst.c
+++ b/src/acpi/erst/erst.c
@@ -40,9 +40,9 @@ static int erst_test1(fwts_framework *fw)
uint32_t i;
fwts_log_info_verbatim(fw, "ERST Error Record Serialization Table :");
- fwts_log_info_verbatim(fw, " Serialization Hdr. Size: 0x%8.8" PRIx32, erst->serialization_header_size);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, erst->reserved);
- fwts_log_info_verbatim(fw, " Instruction Entry Count: 0x%8.8" PRIx32, erst->instruction_entry_count);
+ fwts_log_info_simp_int(fw, " Serialization Hdr. Size: ", erst->serialization_header_size);
+ fwts_log_info_simp_int(fw, " Reserved: ", erst->reserved);
+ fwts_log_info_simp_int(fw, " Instruction Entry Count: ", erst->instruction_entry_count);
fwts_acpi_reserved_zero_check(fw, "ERST", "Reserved", erst->reserved, sizeof(erst->reserved), &passed);
@@ -80,17 +80,18 @@ static int erst_test1(fwts_framework *fw)
#if defined(ERST_DEBUG_ENTRY)
/* Disable this for now, it causes the test to be too verbose */
fwts_log_info_verbatim(fw, "ERST Serialization Instruction Entry %" PRIu32 ":", i);
- fwts_log_info_verbatim(fw, " Serialization Action: 0x%8.8" PRIx8, entry->serialization_action);
- fwts_log_info_verbatim(fw, " Instruction: 0x%8.8" PRIx8, entry->instruction);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx8, entry->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx8, entry->reserved);
- fwts_log_info_verbatim(fw, " Value: 0x%16.16" PRIx64, entry->value);
- fwts_log_info_verbatim(fw, " Mask: 0x%16.16" PRIx64, entry->mask);
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, entry->register_region.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, entry->register_region.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, entry->register_region.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, entry->register_region.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, entry->register_region.address);
+ fwts_log_info_simp_int(fw, " Serialization Action: ", entry->serialization_action);
+ fwts_log_info_simp_int(fw, " Instruction: ", entry->instruction);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Value: ", entry->value);
+ fwts_log_info_simp_int(fw, " Mask: ", entry->mask);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", entry->register_region.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", entry->register_region.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", entry->register_region.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", entry->register_region.access_width);
+ fwts_log_info_simp_int(fw, " Address ", entry->register_region.address);
+
#endif
switch (entry->serialization_action) {
diff --git a/src/acpi/facs/facs.c b/src/acpi/facs/facs.c
index c77b8810..a2ee62ee 100644
--- a/src/acpi/facs/facs.c
+++ b/src/acpi/facs/facs.c
@@ -55,15 +55,15 @@ static int facs_test1(fwts_framework *fw)
fwts_log_info_verbatim(fw, "FACS Firmware ACPI Control Structure:");
fwts_log_info_verbatim(fw, " Signature: '%4.4s'", facs->signature);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, facs->length);
- fwts_log_info_verbatim(fw, " Hardware Signature: 0x%8.8" PRIx32, facs->hardware_signature);
- fwts_log_info_verbatim(fw, " Firmware Waking Vector: 0x%8.8" PRIx32, facs->firmware_waking_vector);
- fwts_log_info_verbatim(fw, " Global Lock: 0x%8.8" PRIx32, facs->global_lock);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, facs->flags);
- fwts_log_info_verbatim(fw, " X-Firmware Waking Vector: 0x%16.16" PRIx64, facs->x_firmware_waking_vector);
- fwts_log_info_verbatim(fw, " Version: 0x%2.2" PRIx8, facs->version);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, reserved);
- fwts_log_info_verbatim(fw, " OSPM Flags: 0x%8.8" PRIx32, facs->ospm_flags);
+ fwts_log_info_simp_int(fw, " Length: ", facs->length);
+ fwts_log_info_simp_int(fw, " Hardware Signature: ", facs->hardware_signature);
+ fwts_log_info_simp_int(fw, " Firmware Waking Vector: ", facs->firmware_waking_vector);
+ fwts_log_info_simp_int(fw, " Global Lock: ", facs->global_lock);
+ fwts_log_info_simp_int(fw, " Flags: ", facs->flags);
+ fwts_log_info_simp_int(fw, " X-Firmware Waking Vector: ", facs->x_firmware_waking_vector);
+ fwts_log_info_simp_int(fw, " Version: ", facs->version);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved);
+ fwts_log_info_simp_int(fw, " OSPM Flags: ", facs->ospm_flags);
for (i = 0; i < 24; i+= 4) {
fwts_log_info_verbatim(fw, " Reserved: "
"0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8,
diff --git a/src/acpi/fpdt/fpdt.c b/src/acpi/fpdt/fpdt.c
index 92726d07..5a607963 100644
--- a/src/acpi/fpdt/fpdt.c
+++ b/src/acpi/fpdt/fpdt.c
@@ -36,9 +36,9 @@ static void fpdt_rec_header_dump(
fwts_acpi_table_fpdt_header *header)
{
fwts_log_info_verbatim(fw, " %s:", type_name);
- fwts_log_info_verbatim(fw, " Perf Rec Type: 0x%4.4" PRIx16, header->type);
- fwts_log_info_verbatim(fw, " Rec Length: 0x%2.2" PRIx8, header->length);
- fwts_log_info_verbatim(fw, " Revision: 0x%2.2" PRIx8, header->revision);
+ fwts_log_info_simp_int(fw, " Perf Rec Type: ", header->type);
+ fwts_log_info_simp_int(fw, " Rec Length: ", header->length);
+ fwts_log_info_simp_int(fw, " Revision: ", header->revision);
}
static void fpdt_dump_raw_data(
@@ -100,8 +100,8 @@ static int fpdt_test1(fwts_framework *fw)
fbbpr->fpdt.length, sizeof(fwts_acpi_table_fpdt_basic_boot_perf_ptr));
} else {
fpdt_rec_header_dump(fw, " Firmware Basic Boot Performance Pointer Record", fpdt);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, fbbpr->reserved);
- fwts_log_info_verbatim(fw, " FBPT Pointer: 0x%16.16" PRIx64, fbbpr->fbpt_addr);
+ fwts_log_info_simp_int(fw, " Reserved: ", fbbpr->reserved);
+ fwts_log_info_simp_int(fw, " FBPT Pointer: ", fbbpr->fbpt_addr);
fwts_acpi_reserved_zero_check(fw, "FPDT", "Reserved", fbbpr->reserved, sizeof(fbbpr->reserved), &passed);
@@ -127,8 +127,8 @@ static int fpdt_test1(fwts_framework *fw)
s3ptpr->fpdt.length, sizeof(fwts_acpi_table_fpdt_s3_perf_ptr));
} else {
fpdt_rec_header_dump(fw, "S3 Performance Table Pointer Record", fpdt);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, s3ptpr->reserved);
- fwts_log_info_verbatim(fw, " S3PT Pointer: 0x%16.16" PRIx64, s3ptpr->s3pt_addr);
+ fwts_log_info_simp_int(fw, " Reserved: ", s3ptpr->reserved);
+ fwts_log_info_simp_int(fw, " S3PT Pointer: ", s3ptpr->s3pt_addr);
fwts_acpi_reserved_zero_check(fw, "FPDT", "Reserved", s3ptpr->reserved, sizeof(s3ptpr->reserved), &passed);
diff --git a/src/acpi/hest/hest.c b/src/acpi/hest/hest.c
index 5ecee00d..7fad85aa 100644
--- a/src/acpi/hest/hest.c
+++ b/src/acpi/hest/hest.c
@@ -72,17 +72,17 @@ static void hest_check_ia32_arch_machine_check_exception(
((uint64_t) exception->reserved2[6] << 48);
fwts_log_info_verbatim(fw, "HEST IA-32 Architecture Machine Check Exception:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, exception->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, exception->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, exception->reserved1);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, exception->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, exception->enabled);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, exception->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, exception->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Global Capability Data: 0x%16.16" PRIx64, exception->global_capability_init_data);
- fwts_log_info_verbatim(fw, " Global Control Data: 0x%16.16" PRIx64, exception->global_control_init_data);
- fwts_log_info_verbatim(fw, " Number of Hardware Banks: 0x%8.8" PRIx32, exception->number_of_hardware_banks);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, reserved2);
+ fwts_log_info_simp_int(fw, " Type: ", exception->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", exception->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", exception->reserved1);
+ fwts_log_info_simp_int(fw, " Flags: ", exception->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", exception->enabled);
+ fwts_log_info_simp_int(fw, " Number of Records: ", exception->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", exception->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Global Capability Data: ", exception->global_capability_init_data);
+ fwts_log_info_simp_int(fw, " Global Control Data: ", exception->global_control_init_data);
+ fwts_log_info_simp_int(fw, " Number of Hardware Banks: ", exception->number_of_hardware_banks);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved2);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "MCE Reserved1", exception->reserved1, sizeof(exception->reserved1), passed);
@@ -109,15 +109,15 @@ static void hest_check_ia32_arch_machine_check_exception(
fwts_acpi_table_hest_machine_check_bank *bank = &exception->bank[i];
fwts_log_info_verbatim(fw, " HEST IA-32 Architecture Machine Check Exception Bank %zd", i);
- fwts_log_info_verbatim(fw, " Bank Number: 0x%2.2" PRIx8, bank->bank_number);
- fwts_log_info_verbatim(fw, " Clear Status On Init.: 0x%2.2" PRIx8, bank->clear_status_on_initialization);
- fwts_log_info_verbatim(fw, " Status Data Format: 0x%2.2" PRIx8, bank->status_data_format);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, bank->reserved);
- fwts_log_info_verbatim(fw, " Control Reg. MSR Addr: 0x%8.8" PRIx32, bank->control_register_msr_address);
- fwts_log_info_verbatim(fw, " Control Init Data: 0x%16.16" PRIx64, bank->control_init_data);
- fwts_log_info_verbatim(fw, " Status Reg. MSR Addr: 0x%8.8" PRIx32, bank->status_register_msr_address);
- fwts_log_info_verbatim(fw, " Addr Reg. MSR Addr: 0x%8.8" PRIx32, bank->address_register_msr_address);
- fwts_log_info_verbatim(fw, " Misc Reg. MSR Addr: 0x%8.8" PRIx32, bank->misc_register_msr_address);
+ fwts_log_info_simp_int(fw, " Bank Number: ", bank->bank_number);
+ fwts_log_info_simp_int(fw, " Clear Status On Init.: ", bank->clear_status_on_initialization);
+ fwts_log_info_simp_int(fw, " Status Data Format: ", bank->status_data_format);
+ fwts_log_info_simp_int(fw, " Reserved: ", bank->reserved);
+ fwts_log_info_simp_int(fw, " Control Reg. MSR Addr: ", bank->control_register_msr_address);
+ fwts_log_info_simp_int(fw, " Control Init Data: ", bank->control_init_data);
+ fwts_log_info_simp_int(fw, " Status Reg. MSR Addr: ", bank->status_register_msr_address);
+ fwts_log_info_simp_int(fw, " Addr Reg. MSR Addr: ", bank->address_register_msr_address);
+ fwts_log_info_simp_int(fw, " Misc Reg. MSR Addr: ", bank->misc_register_msr_address);
fwts_log_nl(fw);
if (bank->clear_status_on_initialization > 1) {
@@ -186,32 +186,32 @@ static void hest_check_ia32_arch_corrected_machine_check(
((uint32_t) check->reserved2[2] << 16);
fwts_log_info_verbatim(fw, "HEST IA-32 Architecture Machine Check:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, check->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, check->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, check->reserved1);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, check->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, check->enabled);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, check->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, check->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Type: ", check->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", check->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", check->reserved1);
+ fwts_log_info_simp_int(fw, " Flags: ", check->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", check->enabled);
+ fwts_log_info_simp_int(fw, " Number of Records: ", check->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", check->max_sections_per_record);
fwts_log_info_verbatim(fw, " Hardware Error Notification:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, check->notification.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, check->notification.length);
- fwts_log_info_verbatim(fw, " Config. Write. Enable: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Type: ", check->notification.type);
+ fwts_log_info_simp_int(fw, " Length: ", check->notification.length);
+ fwts_log_info_simp_int(fw, " Config. Write. Enable: ",
check->notification.configuration_write_enable);
- fwts_log_info_verbatim(fw, " Poll Interval: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Poll Interval: ",
check->notification.poll_interval);
- fwts_log_info_verbatim(fw, " Interrupt Vector: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Interrupt Vector: ",
check->notification.vector);
- fwts_log_info_verbatim(fw, " Sw. to Polling Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Value: ",
check->notification.switch_to_polling_threshold_value);
- fwts_log_info_verbatim(fw, " Sw. to Polling Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Window: ",
check->notification.switch_to_polling_threshold_window);
- fwts_log_info_verbatim(fw, " Error: Thresh. Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Value: ",
check->notification.error_threshold_value);
- fwts_log_info_verbatim(fw, " Error: Thresh. Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Window: ",
check->notification.error_threshold_window);
- fwts_log_info_verbatim(fw, " Number of Hardware Banks: 0x%8.8" PRIx32, check->number_of_hardware_banks);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, reserved2);
+ fwts_log_info_simp_int(fw, " Number of Hardware Banks: ", check->number_of_hardware_banks);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved2);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "Machine Check Reserved1", check->reserved1, sizeof(check->reserved1), passed);
@@ -248,15 +248,15 @@ static void hest_check_ia32_arch_corrected_machine_check(
fwts_acpi_table_hest_machine_check_bank *bank = &check->bank[i];
fwts_log_info_verbatim(fw, " HEST IA-32 Architecture Machine Check Bank %zd", i);
- fwts_log_info_verbatim(fw, " Bank Number: 0x%2.2" PRIx8, bank->bank_number);
- fwts_log_info_verbatim(fw, " Clear Status On Init.: 0x%2.2" PRIx8, bank->clear_status_on_initialization);
- fwts_log_info_verbatim(fw, " Status Data Format: 0x%2.2" PRIx8, bank->status_data_format);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, bank->reserved);
- fwts_log_info_verbatim(fw, " Control Reg. MSR Addr: 0x%8.8" PRIx32, bank->control_register_msr_address);
- fwts_log_info_verbatim(fw, " Control Init Data: 0x%16.16" PRIx64, bank->control_init_data);
- fwts_log_info_verbatim(fw, " Status Reg. MSR Addr: 0x%8.8" PRIx32, bank->status_register_msr_address);
- fwts_log_info_verbatim(fw, " Addr Reg. MSR Addr: 0x%8.8" PRIx32, bank->address_register_msr_address);
- fwts_log_info_verbatim(fw, " Misc Reg. MSR Addr: 0x%8.8" PRIx32, bank->misc_register_msr_address);
+ fwts_log_info_simp_int(fw, " Bank Number: ", bank->bank_number);
+ fwts_log_info_simp_int(fw, " Clear Status On Init.: ", bank->clear_status_on_initialization);
+ fwts_log_info_simp_int(fw, " Status Data Format: ", bank->status_data_format);
+ fwts_log_info_simp_int(fw, " Reserved: ", bank->reserved);
+ fwts_log_info_simp_int(fw, " Control Reg. MSR Addr: ", bank->control_register_msr_address);
+ fwts_log_info_simp_int(fw, " Control Init Data: ", bank->control_init_data);
+ fwts_log_info_simp_int(fw, " Status Reg. MSR Addr: ", bank->status_register_msr_address);
+ fwts_log_info_simp_int(fw, " Addr Reg. MSR Addr: ", bank->address_register_msr_address);
+ fwts_log_info_simp_int(fw, " Misc Reg. MSR Addr: ", bank->misc_register_msr_address);
fwts_log_nl(fw);
if (bank->clear_status_on_initialization > 1) {
@@ -311,12 +311,12 @@ static void hest_check_acpi_table_hest_nmi_error(
}
fwts_log_info_verbatim(fw, "HEST IA-32 Architecture Non-Maskable Interrupt:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, err->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, err->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, err->reserved1);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, err->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, err->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Max Raw Data Length: 0x%8.8" PRIx32, err->max_raw_data_length);
+ fwts_log_info_simp_int(fw, " Type: ", err->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", err->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", err->reserved1);
+ fwts_log_info_simp_int(fw, " Number of Records: ", err->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", err->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Max Raw Data Length: ", err->max_raw_data_length);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "NMI Reserved", err->reserved1, sizeof(err->reserved1), passed);
@@ -369,23 +369,23 @@ static void hest_check_pci_express_root_port_aer(
}
fwts_log_info_verbatim(fw, "HEST PCI Express Root Port AER:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, aer->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, aer->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, aer->reserved1);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, aer->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, aer->enabled);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, aer->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, aer->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Bus: 0x%8.8" PRIx32, aer->bus);
- fwts_log_info_verbatim(fw, " Device: 0x%4.4" PRIx16, aer->device);
- fwts_log_info_verbatim(fw, " Function: 0x%4.4" PRIx16, aer->function);
- fwts_log_info_verbatim(fw, " Device Control: 0x%4.4" PRIx16, aer->device_control);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, aer->reserved2);
- fwts_log_info_verbatim(fw, " Uncorrectable Mask: 0x%8.8" PRIx32, aer->uncorrectable_error_mask);
- fwts_log_info_verbatim(fw, " Uncorrectable Severity: 0x%8.8" PRIx32, aer->uncorrectable_error_severity);
- fwts_log_info_verbatim(fw, " Correctable Error Mask: 0x%8.8" PRIx32, aer->correctable_error_mask);
- fwts_log_info_verbatim(fw, " Advanced Capabilities: 0x%8.8" PRIx32, aer->advanced_error_capabilities_and_control);
- fwts_log_info_verbatim(fw, " Root Error Command: 0x%8.8" PRIx32, aer->root_error_command);
+ fwts_log_info_simp_int(fw, " Type: ", aer->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", aer->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", aer->reserved1);
+ fwts_log_info_simp_int(fw, " Flags: ", aer->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", aer->enabled);
+ fwts_log_info_simp_int(fw, " Number of Records: ", aer->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", aer->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Bus: ", aer->bus);
+ fwts_log_info_simp_int(fw, " Device: ", aer->device);
+ fwts_log_info_simp_int(fw, " Function: ", aer->function);
+ fwts_log_info_simp_int(fw, " Device Control: ", aer->device_control);
+ fwts_log_info_simp_int(fw, " Reserved: ", aer->reserved2);
+ fwts_log_info_simp_int(fw, " Uncorrectable Mask: ", aer->uncorrectable_error_mask);
+ fwts_log_info_simp_int(fw, " Uncorrectable Severity: ", aer->uncorrectable_error_severity);
+ fwts_log_info_simp_int(fw, " Correctable Error Mask: ", aer->correctable_error_mask);
+ fwts_log_info_simp_int(fw, " Advanced Capabilities: ", aer->advanced_error_capabilities_and_control);
+ fwts_log_info_simp_int(fw, " Root Error Command: ", aer->root_error_command);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "PCI Express Root Port Reserved1", aer->reserved1, sizeof(aer->reserved1), passed);
@@ -439,21 +439,21 @@ static void hest_check_pci_express_device_aer(
}
fwts_log_info_verbatim(fw, "HEST PCI Express Device AER:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, aer->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, aer->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, aer->reserved1);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, aer->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, aer->enabled);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, aer->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, aer->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Bus: 0x%8.8" PRIx32, aer->bus);
- fwts_log_info_verbatim(fw, " Device: 0x%4.4" PRIx16, aer->device);
- fwts_log_info_verbatim(fw, " Function: 0x%4.4" PRIx16, aer->function);
- fwts_log_info_verbatim(fw, " Device Control: 0x%4.4" PRIx16, aer->device_control);
- fwts_log_info_verbatim(fw, " Uncorrectable Mask: 0x%8.8" PRIx32, aer->uncorrectable_error_mask);
- fwts_log_info_verbatim(fw, " Uncorrectable Severity: 0x%8.8" PRIx32, aer->uncorrectable_error_severity);
- fwts_log_info_verbatim(fw, " Correctable Error Mask: 0x%8.8" PRIx32, aer->correctable_error_mask);
- fwts_log_info_verbatim(fw, " Advanced Capabilities: 0x%8.8" PRIx32, aer->advanced_error_capabilities_and_control);
+ fwts_log_info_simp_int(fw, " Type: ", aer->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", aer->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", aer->reserved1);
+ fwts_log_info_simp_int(fw, " Flags: ", aer->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", aer->enabled);
+ fwts_log_info_simp_int(fw, " Number of Records: ", aer->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", aer->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Bus: ", aer->bus);
+ fwts_log_info_simp_int(fw, " Device: ", aer->device);
+ fwts_log_info_simp_int(fw, " Function: ", aer->function);
+ fwts_log_info_simp_int(fw, " Device Control: ", aer->device_control);
+ fwts_log_info_simp_int(fw, " Uncorrectable Mask: ", aer->uncorrectable_error_mask);
+ fwts_log_info_simp_int(fw, " Uncorrectable Severity: ", aer->uncorrectable_error_severity);
+ fwts_log_info_simp_int(fw, " Correctable Error Mask: ", aer->correctable_error_mask);
+ fwts_log_info_simp_int(fw, " Advanced Capabilities: ", aer->advanced_error_capabilities_and_control);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "PCI Express Device Reserved1", aer->reserved1, sizeof(aer->reserved1), passed);
@@ -507,25 +507,25 @@ static void hest_heck_pci_express_bridge_aer(
}
fwts_log_info_verbatim(fw, "HEST PCI Express Bridge AER:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, aer->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, aer->source_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, aer->reserved1);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, aer->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, aer->enabled);
- fwts_log_info_verbatim(fw, " Number of Records: 0x%8.8" PRIx32, aer->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max Sections Per Record: 0x%8.8" PRIx32, aer->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Bus: 0x%8.8" PRIx32, aer->bus);
- fwts_log_info_verbatim(fw, " Device: 0x%4.4" PRIx16, aer->device);
- fwts_log_info_verbatim(fw, " Function: 0x%4.4" PRIx16, aer->function);
- fwts_log_info_verbatim(fw, " Device Control: 0x%4.4" PRIx16, aer->device_control);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, aer->reserved2);
- fwts_log_info_verbatim(fw, " Uncorrectable Mask: 0x%8.8" PRIx32, aer->uncorrectable_error_mask);
- fwts_log_info_verbatim(fw, " Uncorrectable Severity: 0x%8.8" PRIx32, aer->uncorrectable_error_severity);
- fwts_log_info_verbatim(fw, " Correctable Mask: 0x%8.8" PRIx32, aer->correctable_error_mask);
- fwts_log_info_verbatim(fw, " Advanced Capabilities: 0x%8.8" PRIx32, aer->advanced_error_capabilities_and_control);
- fwts_log_info_verbatim(fw, " 2nd Uncorrectable Mask: 0x%8.8" PRIx32, aer->secondary_uncorrectable_error_mask);
- fwts_log_info_verbatim(fw, " 2nd Uncurrectable Svrity: 0x%8.8" PRIx32, aer->secondary_uncorrectable_error_severity);
- fwts_log_info_verbatim(fw, " 2nd Advanced Capabilities:0x%8.8" PRIx32, aer->secondary_advanced_error_capabilities_and_control);
+ fwts_log_info_simp_int(fw, " Type: ", aer->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", aer->source_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", aer->reserved1);
+ fwts_log_info_simp_int(fw, " Flags: ", aer->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", aer->enabled);
+ fwts_log_info_simp_int(fw, " Number of Records: ", aer->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max Sections Per Record: ", aer->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Bus: ", aer->bus);
+ fwts_log_info_simp_int(fw, " Device: ", aer->device);
+ fwts_log_info_simp_int(fw, " Function: ", aer->function);
+ fwts_log_info_simp_int(fw, " Device Control: ", aer->device_control);
+ fwts_log_info_simp_int(fw, " Reserved: ", aer->reserved2);
+ fwts_log_info_simp_int(fw, " Uncorrectable Mask: ", aer->uncorrectable_error_mask);
+ fwts_log_info_simp_int(fw, " Uncorrectable Severity: ", aer->uncorrectable_error_severity);
+ fwts_log_info_simp_int(fw, " Correctable Mask: ", aer->correctable_error_mask);
+ fwts_log_info_simp_int(fw, " Advanced Capabilities: ", aer->advanced_error_capabilities_and_control);
+ fwts_log_info_simp_int(fw, " 2nd Uncorrectable Mask: ", aer->secondary_uncorrectable_error_mask);
+ fwts_log_info_simp_int(fw, " 2nd Uncurrectable Svrity: ", aer->secondary_uncorrectable_error_severity);
+ fwts_log_info_simp_int(fw, " 2nd Advanced Capabilities:", aer->secondary_advanced_error_capabilities_and_control);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "HEST", "PCI Express Bridge Reserved1", aer->reserved1, sizeof(aer->reserved1), passed);
@@ -581,44 +581,44 @@ static void hest_check_generic_error_source(
}
fwts_log_info_verbatim(fw, "HEST Generic Hardware Error Source");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, source->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, source->source_id);
- fwts_log_info_verbatim(fw, " Related Source ID: 0x%4.4" PRIx16, source->related_source_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, source->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, source->enabled);
- fwts_log_info_verbatim(fw, " Num. Records. Prealloc.: 0x%8.8" PRIx32, source->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max. Sections Per Rec.: 0x%8.8" PRIx32, source->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Max. Raw Data Length: 0x%8.8" PRIx32, source->max_raw_data_length);
+ fwts_log_info_simp_int(fw, " Type: ", source->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", source->source_id);
+ fwts_log_info_simp_int(fw, " Related Source ID: ", source->related_source_id);
+ fwts_log_info_simp_int(fw, " Flags: ", source->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", source->enabled);
+ fwts_log_info_simp_int(fw, " Num. Records. Prealloc.: ", source->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max. Sections Per Rec.: ", source->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Max. Raw Data Length: ", source->max_raw_data_length);
fwts_log_info_verbatim(fw, " Error Status Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Address Space ID: ",
source->error_status_address.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Width ",
source->error_status_address.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Offset ",
source->error_status_address.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Access Size ",
source->error_status_address.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64,
+ fwts_log_info_simp_int(fw, " Address ",
source->error_status_address.address);
fwts_log_info_verbatim(fw, " Hardware Error Notification:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, source->notification.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, source->notification.length);
- fwts_log_info_verbatim(fw, " Config. Write. Enable: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Type: ", source->notification.type);
+ fwts_log_info_simp_int(fw, " Length: ", source->notification.length);
+ fwts_log_info_simp_int(fw, " Config. Write. Enable: ",
source->notification.configuration_write_enable);
- fwts_log_info_verbatim(fw, " Poll Interval: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Poll Interval: ",
source->notification.poll_interval);
- fwts_log_info_verbatim(fw, " Interrupt Vector: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Interrupt Vector: ",
source->notification.vector);
- fwts_log_info_verbatim(fw, " Sw. to Polling Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Value: ",
source->notification.switch_to_polling_threshold_value);
- fwts_log_info_verbatim(fw, " Sw. to Polling Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Window: ",
source->notification.switch_to_polling_threshold_window);
- fwts_log_info_verbatim(fw, " Error: Thresh. Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Value: ",
source->notification.error_threshold_value);
- fwts_log_info_verbatim(fw, " Error: Thresh. Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Window: ",
source->notification.error_threshold_window);
- fwts_log_info_verbatim(fw, " Error Status Blk. Length: 0x%8.8" PRIx32, source->error_status_block_length);
+ fwts_log_info_simp_int(fw, " Error Status Blk. Length: ", source->error_status_block_length);
fwts_log_nl(fw);
if (source->number_of_records_to_preallocate < 1) {
@@ -683,57 +683,57 @@ static void hest_check_generic_error_source_v2(
}
fwts_log_info_verbatim(fw, "HEST Generic Hardware Error Source version 2");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, source->type);
- fwts_log_info_verbatim(fw, " Source ID: 0x%4.4" PRIx16, source->source_id);
- fwts_log_info_verbatim(fw, " Related Source ID: 0x%4.4" PRIx16, source->related_source_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, source->flags);
- fwts_log_info_verbatim(fw, " Enabled: 0x%2.2" PRIx8, source->enabled);
- fwts_log_info_verbatim(fw, " Num. Records. Prealloc.: 0x%8.8" PRIx32, source->number_of_records_to_preallocate);
- fwts_log_info_verbatim(fw, " Max. Sections Per Rec.: 0x%8.8" PRIx32, source->max_sections_per_record);
- fwts_log_info_verbatim(fw, " Max. Raw Data Length: 0x%8.8" PRIx32, source->max_raw_data_length);
+ fwts_log_info_simp_int(fw, " Type: ", source->type);
+ fwts_log_info_simp_int(fw, " Source ID: ", source->source_id);
+ fwts_log_info_simp_int(fw, " Related Source ID: ", source->related_source_id);
+ fwts_log_info_simp_int(fw, " Flags: ", source->flags);
+ fwts_log_info_simp_int(fw, " Enabled: ", source->enabled);
+ fwts_log_info_simp_int(fw, " Num. Records. Prealloc.: ", source->number_of_records_to_preallocate);
+ fwts_log_info_simp_int(fw, " Max. Sections Per Rec.: ", source->max_sections_per_record);
+ fwts_log_info_simp_int(fw, " Max. Raw Data Length: ", source->max_raw_data_length);
fwts_log_info_verbatim(fw, " Error Status Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Address Space ID: ",
source->error_status_address.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Width ",
source->error_status_address.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Offset ",
source->error_status_address.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Access Size ",
source->error_status_address.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64,
+ fwts_log_info_simp_int(fw, " Address ",
source->error_status_address.address);
fwts_log_info_verbatim(fw, " Hardware Error Notification:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, source->notification.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, source->notification.length);
- fwts_log_info_verbatim(fw, " Config. Write. Enable: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Type: ", source->notification.type);
+ fwts_log_info_simp_int(fw, " Length: ", source->notification.length);
+ fwts_log_info_simp_int(fw, " Config. Write. Enable: ",
source->notification.configuration_write_enable);
- fwts_log_info_verbatim(fw, " Poll Interval: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Poll Interval: ",
source->notification.poll_interval);
- fwts_log_info_verbatim(fw, " Interrupt Vector: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Interrupt Vector: ",
source->notification.vector);
- fwts_log_info_verbatim(fw, " Sw. to Polling Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Value: ",
source->notification.switch_to_polling_threshold_value);
- fwts_log_info_verbatim(fw, " Sw. to Polling Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Sw. to Polling Window: ",
source->notification.switch_to_polling_threshold_window);
- fwts_log_info_verbatim(fw, " Error: Thresh. Value: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Value: ",
source->notification.error_threshold_value);
- fwts_log_info_verbatim(fw, " Error: Thresh. Window: 0x%4.4" PRIx16,
+ fwts_log_info_simp_int(fw, " Error: Thresh. Window: ",
source->notification.error_threshold_window);
- fwts_log_info_verbatim(fw, " Error Status Blk. Length: 0x%8.8" PRIx32, source->error_status_block_length);
+ fwts_log_info_simp_int(fw, " Error Status Blk. Length: ", source->error_status_block_length);
fwts_log_info_verbatim(fw, " Read Ack Register:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Address Space ID: ",
source->read_ack_register.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Width ",
source->read_ack_register.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Register Bit Offset ",
source->read_ack_register.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8,
+ fwts_log_info_simp_int(fw, " Access Size ",
source->read_ack_register.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64,
+ fwts_log_info_simp_int(fw, " Address ",
source->read_ack_register.address);
- fwts_log_info_verbatim(fw, " Read Ack Preserve: 0x%16.16" PRIx64, source->read_ack_preserve);
- fwts_log_info_verbatim(fw, " Read Ack Write: 0x%16.16" PRIx64, source->read_ack_write);
+ fwts_log_info_simp_int(fw, " Read Ack Preserve: ", source->read_ack_preserve);
+ fwts_log_info_simp_int(fw, " Read Ack Write: ", source->read_ack_write);
fwts_log_nl(fw);
if (source->number_of_records_to_preallocate < 1) {
@@ -797,7 +797,7 @@ static int hest_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "HEST Hardware Error Source Table test");
- fwts_log_info_verbatim(fw, " Error Source Count: 0x%2.2" PRIx8, hest->error_source_count);
+ fwts_log_info_simp_int(fw, " Error Source Count: ", hest->error_source_count);
fwts_log_nl(fw);
data += sizeof(fwts_acpi_table_hest);
diff --git a/src/acpi/hmat/hmat.c b/src/acpi/hmat/hmat.c
index f73968b6..307adcfd 100644
--- a/src/acpi/hmat/hmat.c
+++ b/src/acpi/hmat/hmat.c
@@ -29,16 +29,16 @@ acpi_table_init(HMAT, &table)
static void hmat_proximity_domain_test(fwts_framework *fw, const fwts_acpi_table_hmat_proximity_domain *entry, bool *passed)
{
fwts_log_info_verbatim(fw, " Memory Proximity Domain Attributes (Type 0):");
- fwts_log_info_verbatim(fw, " Type: 0x%4.4" PRIx16, entry->header.type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->header.reserved);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, entry->header.length);
- fwts_log_info_verbatim(fw, " Flags: 0x%4.4" PRIx16, entry->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved1);
- fwts_log_info_verbatim(fw, " Proximity Domain for Initiator: 0x%8.8" PRIx32, entry->initiator_proximity_domain);
- fwts_log_info_verbatim(fw, " Proximity Domain for Memory: 0x%8.8" PRIx32, entry->memory_proximity_domain);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, entry->reserved2);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, entry->reserved3);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, entry->reserved4);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->header.reserved);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved1);
+ fwts_log_info_simp_int(fw, " Proximity Domain for Initiator: ", entry->initiator_proximity_domain);
+ fwts_log_info_simp_int(fw, " Proximity Domain for Memory: ", entry->memory_proximity_domain);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved2);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved3);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved4);
fwts_acpi_reserved_zero_check(fw, "HMAT", "Reserved", entry->header.reserved, sizeof(entry->header.reserved), passed);
fwts_acpi_reserved_bits_check(fw, "HMAT", "Flags", entry->flags, sizeof(entry->flags), 1, 15, passed);
@@ -53,16 +53,16 @@ static void hmat_locality_test(fwts_framework *fw, const fwts_acpi_table_hmat_lo
uint32_t pd_size;
fwts_log_info_verbatim(fw, " System Locality Latency and Bandwidth Information (Type 1):");
- fwts_log_info_verbatim(fw, " Type: 0x%4.4" PRIx16, entry->header.type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->header.reserved);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, entry->header.length);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, entry->flags);
- fwts_log_info_verbatim(fw, " Data Type: 0x%2.2" PRIx8, entry->data_type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved1);
- fwts_log_info_verbatim(fw, " Number of Initiator PDs: 0x%8.8" PRIx32, entry->num_initiator);
- fwts_log_info_verbatim(fw, " Number of Target PDs: 0x%8.8" PRIx32, entry->num_target);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, entry->reserved2);
- fwts_log_info_verbatim(fw, " Entry Base Unit: 0x%16.16" PRIx64, entry->entry_base_unit);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->header.reserved);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Data Type: ", entry->data_type);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved1);
+ fwts_log_info_simp_int(fw, " Number of Initiator PDs: ", entry->num_initiator);
+ fwts_log_info_simp_int(fw, " Number of Target PDs: ", entry->num_target);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved2);
+ fwts_log_info_simp_int(fw, " Entry Base Unit: ", entry->entry_base_unit);
fwts_acpi_reserved_zero_check(fw, "HMAT", "Reserved", entry->header.reserved, sizeof(entry->header.reserved), passed);
fwts_acpi_reserved_bits_check(fw, "HMAT", "Flags", entry->flags, sizeof(entry->flags), 4, 7, passed);
@@ -98,15 +98,15 @@ static void hmat_locality_test(fwts_framework *fw, const fwts_acpi_table_hmat_lo
static void hmat_cache_test(fwts_framework *fw, const fwts_acpi_table_hmat_cache *entry, bool *passed)
{
fwts_log_info_verbatim(fw, " Memory Side Cache Information (Type 2):");
- fwts_log_info_verbatim(fw, " Type: 0x%4.4" PRIx16, entry->header.type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->header.reserved);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, entry->header.length);
- fwts_log_info_verbatim(fw, " Proximity Domain for Memory: 0x%8.8" PRIx32, entry->memory_proximity_domain);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, entry->reserved1);
- fwts_log_info_verbatim(fw, " Memory Side Cache Size: 0x%16.16" PRIx64, entry->cache_size);
- fwts_log_info_verbatim(fw, " Cache Attributes: 0x%8.8" PRIx32, entry->cache_attr);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved2);
- fwts_log_info_verbatim(fw, " Number of SMBIOS Handles: 0x%4.4" PRIx16, entry->num_smbios);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->header.reserved);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Proximity Domain for Memory: ", entry->memory_proximity_domain);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved1);
+ fwts_log_info_simp_int(fw, " Memory Side Cache Size: ", entry->cache_size);
+ fwts_log_info_simp_int(fw, " Cache Attributes: ", entry->cache_attr);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved2);
+ fwts_log_info_simp_int(fw, " Number of SMBIOS Handles: ", entry->num_smbios);
fwts_acpi_reserved_zero_check(fw, "HMAT", "Reserved", entry->header.reserved, sizeof(entry->header.reserved), passed);
@@ -141,7 +141,7 @@ static int hmat_test1(fwts_framework *fw)
uint32_t offset;
fwts_log_info_verbatim(fw, "HMAT Heterogeneous Memory Attribute Table:");
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, hmat->reserved);
+ fwts_log_info_simp_int(fw, " Reserved: ", hmat->reserved);
fwts_acpi_reserved_zero_check(fw, "HMAT", "Reserved", hmat->reserved, sizeof(hmat->reserved), &passed);
diff --git a/src/acpi/iort/iort.c b/src/acpi/iort/iort.c
index 467c1fc1..2b7e869e 100644
--- a/src/acpi/iort/iort.c
+++ b/src/acpi/iort/iort.c
@@ -39,12 +39,12 @@ static void iort_node_dump(
fwts_acpi_table_iort_node *node)
{
fwts_log_info_verbatim(fw, "%s:", node_name);
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, node->type);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, node->length);
- fwts_log_info_verbatim(fw, " Revision: 0x%2.2" PRIx8, node->revision);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, node->reserved);
- fwts_log_info_verbatim(fw, " Number of ID mappings: 0x%8.8" PRIx32, node->id_mappings_count);
- fwts_log_info_verbatim(fw, " Reference to ID Array: 0x%8.8" PRIx32, node->id_array_offset);
+ fwts_log_info_simp_int(fw, " Type: ", node->type);
+ fwts_log_info_simp_int(fw, " Length: ", node->length);
+ fwts_log_info_simp_int(fw, " Revision: ", node->revision);
+ fwts_log_info_simp_int(fw, " Reserved: ", node->reserved);
+ fwts_log_info_simp_int(fw, " Number of ID mappings: ", node->id_mappings_count);
+ fwts_log_info_simp_int(fw, " Reference to ID Array: ", node->id_array_offset);
}
/*
@@ -108,11 +108,11 @@ static void iort_id_mapping_dump(
fwts_acpi_table_iort_id_mapping *id_mapping)
{
fwts_log_info_verbatim(fw, "ID Mapping %" PRIu32, i);
- fwts_log_info_verbatim(fw, " Input Base: 0x%8.8" PRIx32, id_mapping->input_base);
- fwts_log_info_verbatim(fw, " ID Count: 0x%8.8" PRIx32, id_mapping->id_count);
- fwts_log_info_verbatim(fw, " Output Base: 0x%8.8" PRIx32, id_mapping->output_base);
- fwts_log_info_verbatim(fw, " Output Reference: 0x%8.8" PRIx32, id_mapping->output_reference);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, id_mapping->flags);
+ fwts_log_info_simp_int(fw, " Input Base: ", id_mapping->input_base);
+ fwts_log_info_simp_int(fw, " ID Count: ", id_mapping->id_count);
+ fwts_log_info_simp_int(fw, " Output Base: ", id_mapping->output_base);
+ fwts_log_info_simp_int(fw, " Output Reference: ", id_mapping->output_reference);
+ fwts_log_info_simp_int(fw, " Flags: ", id_mapping->flags);
}
/*
@@ -193,8 +193,8 @@ static void iort_smmu_interrupt_dump(
for (i = 0; i < count; i++, intr++) {
if (sizeof(*intr) + (uint8_t *)intr > data_end)
break;
- fwts_log_info_verbatim(fw, " GSIV: 0x%8.8" PRIx32, intr->gsiv);
- fwts_log_info_verbatim(fw, " Interrupt Flags: 0x%8.8" PRIx32, intr->flags);
+ fwts_log_info_simp_int(fw, " GSIV: ", intr->gsiv);
+ fwts_log_info_simp_int(fw, " Interrupt Flags: ", intr->flags);
}
}
@@ -262,10 +262,10 @@ static void iort_smmu_global_interrupt_dump(
(fwts_acpi_table_iort_smmu_global_interrupt_array *)(data + offset);
if (sizeof(*intr) + (uint8_t*)intr <= data_end) {
- fwts_log_info_verbatim(fw, " SMMU_NSgIrpt: 0x%8.8" PRIx32, intr->smmu_nsgirpt);
- fwts_log_info_verbatim(fw, " SMMU_NSgIrpt Flags: 0x%8.8" PRIx32, intr->smmu_nsgirpt_flags);
- fwts_log_info_verbatim(fw, " SMMU_NSgCfgIrpt: 0x%8.8" PRIx32, intr->smmu_nsgcfgirpt);
- fwts_log_info_verbatim(fw, " SMMU_NSgCfgIrpt Flags: 0x%8.8" PRIx32, intr->smmu_nsgcfgirpt_flags);
+ fwts_log_info_simp_int(fw, " SMMU_NSgIrpt: ", intr->smmu_nsgirpt);
+ fwts_log_info_simp_int(fw, " SMMU_NSgIrpt Flags: ", intr->smmu_nsgirpt_flags);
+ fwts_log_info_simp_int(fw, " SMMU_NSgCfgIrpt: ", intr->smmu_nsgcfgirpt);
+ fwts_log_info_simp_int(fw, " SMMU_NSgCfgIrpt Flags: ", intr->smmu_nsgcfgirpt_flags);
}
}
@@ -319,7 +319,7 @@ static void iort_check_its_group(
size_t its_id_array_size = node->its_count * sizeof(*its_id);
iort_node_dump(fw, "IORT ITS Group Node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Number of ITSs: 0x%8.8" PRIx32, node->its_count);
+ fwts_log_info_simp_int(fw, " Number of ITSs: ", node->its_count);
/* Array too big? */
@@ -334,7 +334,7 @@ static void iort_check_its_group(
uint32_t i;
for (i = 0; i < node->its_count; i++, its_id++) {
- fwts_log_info_verbatim(fw, " GIC ITS Identifier: 0x%8.8" PRIx32, *its_id);
+ fwts_log_info_simp_int(fw, " GIC ITS Identifier: ", *its_id);
}
}
iort_node_check(fw, data, true, true, passed);
@@ -413,12 +413,12 @@ static void iort_check_named_component(
uint8_t *obj_name;
iort_node_dump(fw, "IORT Named Component Node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Node Flags: 0x%8.8" PRIx32, node->flags);
- fwts_log_info_verbatim(fw, " Cache Coherent Attribute: 0x%8.8" PRIx32, node->properties.cache_coherent);
- fwts_log_info_verbatim(fw, " Allocation Hints: 0x%2.2" PRIx8, node->properties.allocation_hints);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, node->properties.reserved);
- fwts_log_info_verbatim(fw, " Memory Access Flags 0x%2.2" PRIx8, node->properties.memory_access_flags);
- fwts_log_info_verbatim(fw, " Device Memory Addr. Size: 0x%2.2" PRIx8, node->device_memory_address_size);
+ fwts_log_info_simp_int(fw, " Node Flags: ", node->flags);
+ fwts_log_info_simp_int(fw, " Cache Coherent Attribute: ", node->properties.cache_coherent);
+ fwts_log_info_simp_int(fw, " Allocation Hints: ", node->properties.allocation_hints);
+ fwts_log_info_simp_int(fw, " Reserved: ", node->properties.reserved);
+ fwts_log_info_simp_int(fw, " Memory Access Flags ", node->properties.memory_access_flags);
+ fwts_log_info_simp_int(fw, " Device Memory Addr. Size: ", node->device_memory_address_size);
/* Is object name sane, zero terminated and inside the table? */
for (obj_name = node->device_object_name; *obj_name; obj_name++) {
@@ -467,12 +467,12 @@ static void iort_check_pci_root_complex(
(fwts_acpi_table_iort_pci_root_complex_node *)data;
iort_node_dump(fw, "IORT PCI Root Complex Node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Cache Coherent Attribute: 0x%8.8" PRIx32, node->properties.cache_coherent);
- fwts_log_info_verbatim(fw, " Allocation Hints: 0x%2.2" PRIx8, node->properties.allocation_hints);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, node->properties.reserved);
- fwts_log_info_verbatim(fw, " Memory Access Flags 0x%4.4" PRIx16, node->properties.memory_access_flags);
- fwts_log_info_verbatim(fw, " ATS Attribute: 0x%8.8" PRIx32, node->ats_attribute);
- fwts_log_info_verbatim(fw, " PCI Segment Number: 0x%8.8" PRIx32, node->pci_segment_number);
+ fwts_log_info_simp_int(fw, " Cache Coherent Attribute: ", node->properties.cache_coherent);
+ fwts_log_info_simp_int(fw, " Allocation Hints: ", node->properties.allocation_hints);
+ fwts_log_info_simp_int(fw, " Reserved: ", node->properties.reserved);
+ fwts_log_info_simp_int(fw, " Memory Access Flags ", node->properties.memory_access_flags);
+ fwts_log_info_simp_int(fw, " ATS Attribute: ", node->ats_attribute);
+ fwts_log_info_simp_int(fw, " PCI Segment Number: ", node->pci_segment_number);
iort_id_mappings_dump(fw, data, node_end);
iort_node_check(fw, data, false, false, passed);
@@ -505,15 +505,15 @@ static void iort_check_smmu(
(fwts_acpi_table_iort_smmu_node *)data;
iort_node_dump(fw, "IORT SMMU node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, node->base_address);
- fwts_log_info_verbatim(fw, " Span: 0x%16.16" PRIx64, node->span);
- fwts_log_info_verbatim(fw, " Model: 0x%8.8" PRIx32, node->model);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, node->flags);
- fwts_log_info_verbatim(fw, " Global Intr. Offset: 0x%8.8" PRIx32, node->global_interrupt_array_offset);
- fwts_log_info_verbatim(fw, " Number of Context Intr.: 0x%8.8" PRIx32, node->context_interrupt_count);
- fwts_log_info_verbatim(fw, " Context Intr. Offset: 0x%8.8" PRIx32, node->context_interrupt_array_offset);
- fwts_log_info_verbatim(fw, " Number of PMU Intr.: 0x%8.8" PRIx32, node->pmu_interrupt_count);
- fwts_log_info_verbatim(fw, " PMU Intr. Offset: 0x%8.8" PRIx32, node->pmu_interrupt_array_offset);
+ fwts_log_info_simp_int(fw, " Base Address: ", node->base_address);
+ fwts_log_info_simp_int(fw, " Span: ", node->span);
+ fwts_log_info_simp_int(fw, " Model: ", node->model);
+ fwts_log_info_simp_int(fw, " Flags: ", node->flags);
+ fwts_log_info_simp_int(fw, " Global Intr. Offset: ", node->global_interrupt_array_offset);
+ fwts_log_info_simp_int(fw, " Number of Context Intr.: ", node->context_interrupt_count);
+ fwts_log_info_simp_int(fw, " Context Intr. Offset: ", node->context_interrupt_array_offset);
+ fwts_log_info_simp_int(fw, " Number of PMU Intr.: ", node->pmu_interrupt_count);
+ fwts_log_info_simp_int(fw, " PMU Intr. Offset: ", node->pmu_interrupt_array_offset);
fwts_log_info_verbatim(fw, "Global Interrupt Array:");
iort_smmu_global_interrupt_dump(fw, data, node_end,
@@ -560,15 +560,15 @@ static void iort_check_smmuv3(
(fwts_acpi_table_iort_smmuv3_node *)data;
iort_node_dump(fw, "IORT SMMUv3 node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, node->base_address);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, node->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, node->reserved);
- fwts_log_info_verbatim(fw, " VATOS Address: 0x%16.16" PRIx64, node->vatos_address);
- fwts_log_info_verbatim(fw, " Model: 0x%8.8" PRIx32, node->model);
- fwts_log_info_verbatim(fw, " Event: 0x%8.8" PRIx32, node->event);
- fwts_log_info_verbatim(fw, " PRI: 0x%8.8" PRIx32, node->pri);
- fwts_log_info_verbatim(fw, " GERR: 0x%8.8" PRIx32, node->gerr);
- fwts_log_info_verbatim(fw, " Sync: 0x%8.8" PRIx32, node->sync);
+ fwts_log_info_simp_int(fw, " Base Address: ", node->base_address);
+ fwts_log_info_simp_int(fw, " Flags: ", node->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", node->reserved);
+ fwts_log_info_simp_int(fw, " VATOS Address: ", node->vatos_address);
+ fwts_log_info_simp_int(fw, " Model: ", node->model);
+ fwts_log_info_simp_int(fw, " Event: ", node->event);
+ fwts_log_info_simp_int(fw, " PRI: ", node->pri);
+ fwts_log_info_simp_int(fw, " GERR: ", node->gerr);
+ fwts_log_info_simp_int(fw, " Sync: ", node->sync);
iort_id_mappings_dump(fw, data, node_end);
@@ -600,9 +600,9 @@ static void iort_check_pmcg(
(fwts_acpi_table_iort_pmcg_node *)data;
iort_node_dump(fw, "IORT PMCG node", (fwts_acpi_table_iort_node *)data);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, node->base_address);
- fwts_log_info_verbatim(fw, " Overflow interrupt GSIV: 0x%8.8" PRIx32, node->gsiv);
- fwts_log_info_verbatim(fw, " Node reference: 0x%8.8" PRIx32, node->node_ref);
+ fwts_log_info_simp_int(fw, " Base Address: ", node->base_address);
+ fwts_log_info_simp_int(fw, " Overflow interrupt GSIV: ", node->gsiv);
+ fwts_log_info_simp_int(fw, " Node reference: ", node->node_ref);
iort_id_mappings_dump(fw, data, node_end);
@@ -647,9 +647,9 @@ static int iort_test1(fwts_framework *fw)
data_end = data + table->length;
fwts_log_info_verbatim(fw, "IORT IO Remapping Table test");
- fwts_log_info_verbatim(fw, " Number of IORT Nodes: 0x%4.4" PRIx8, iort->io_rt_nodes_count);
- fwts_log_info_verbatim(fw, " IORT Node Array Offset: 0x%4.4" PRIx8, iort->io_rt_offset);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx8, iort->reserved);
+ fwts_log_info_simp_int(fw, " Number of IORT Nodes: ", iort->io_rt_nodes_count);
+ fwts_log_info_simp_int(fw, " IORT Node Array Offset: ", iort->io_rt_offset);
+ fwts_log_info_simp_int(fw, " Reserved: ", iort->reserved);
fwts_log_nl(fw);
data = (uint8_t *)table->data + iort->io_rt_offset;
diff --git a/src/acpi/lpit/lpit.c b/src/acpi/lpit/lpit.c
index 58a700cd..0e313682 100644
--- a/src/acpi/lpit/lpit.c
+++ b/src/acpi/lpit/lpit.c
@@ -39,8 +39,8 @@ static void lpit_check_type_0(
/* We know table is at least long enough to access type and length.. */
fwts_log_info_verbatim(fw, "Native C-state based LPI structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%8.8" PRIx32, lpi->type);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, lpi->length);
+ fwts_log_info_simp_int(fw, " Type: ", lpi->type);
+ fwts_log_info_simp_int(fw, " Length: ", lpi->length);
if (lpi->length < sizeof(fwts_acpi_table_lpit_c_state)) {
*passed = false;
@@ -54,29 +54,29 @@ static void lpit_check_type_0(
return;
}
- fwts_log_info_verbatim(fw, " ID: 0x%4.4" PRIx16, lpi->id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, lpi->reserved);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, lpi->flags);
+ fwts_log_info_simp_int(fw, " ID: ", lpi->id);
+ fwts_log_info_simp_int(fw, " Reserved: ", lpi->reserved);
+ fwts_log_info_simp_int(fw, " Flags: ", lpi->flags);
fwts_log_info_verbatim(fw, " Entry Trigger:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, lpi->entry_trigger.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, lpi->entry_trigger.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, lpi->entry_trigger.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, lpi->entry_trigger.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, lpi->entry_trigger.address);
- fwts_log_info_verbatim(fw, " Residency: 0x%8.8" PRIx32, lpi->residency);
- fwts_log_info_verbatim(fw, " Latency: 0x%8.8" PRIx32, lpi->latency);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", lpi->entry_trigger.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", lpi->entry_trigger.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", lpi->entry_trigger.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", lpi->entry_trigger.access_width);
+ fwts_log_info_simp_int(fw, " Address ", lpi->entry_trigger.address);
+ fwts_log_info_simp_int(fw, " Residency: ", lpi->residency);
+ fwts_log_info_simp_int(fw, " Latency: ", lpi->latency);
/* If flags [1] set, then counter is not available */
if (lpi->flags & 0x2) {
fwts_log_info_verbatim(fw, " Residency Counter not available");
} else {
fwts_log_info_verbatim(fw, " Residency Counter:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, lpi->residency_counter.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, lpi->residency_counter.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, lpi->residency_counter.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, lpi->residency_counter.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, lpi->residency_counter.address);
- fwts_log_info_verbatim(fw, " Residency Counter Freq: 0x%16.16" PRIx64, lpi->residency_counter_freq);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", lpi->residency_counter.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", lpi->residency_counter.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", lpi->residency_counter.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", lpi->residency_counter.access_width);
+ fwts_log_info_simp_int(fw, " Address ", lpi->residency_counter.address);
+ fwts_log_info_simp_int(fw, " Residency Counter Freq: ", lpi->residency_counter_freq);
}
fwts_log_nl(fw);
diff --git a/src/acpi/mchi/mchi.c b/src/acpi/mchi/mchi.c
index 7fe59ded..fd31c3a4 100644
--- a/src/acpi/mchi/mchi.c
+++ b/src/acpi/mchi/mchi.c
@@ -47,8 +47,8 @@ static int mchi_test1(fwts_framework *fw)
#if DUMP_MCHI_TABLE
fwts_log_info_verbatim(fw, "MCHI Table:");
- fwts_log_info_verbatim(fw, " Interface Type: 0x%2.2" PRIx8, mchi->interface_type);
- fwts_log_info_verbatim(fw, " Protocol Identifier 0x%2.2" PRIx8, mchi->protocol_identifier);
+ fwts_log_info_simp_int(fw, " Interface Type: ", mchi->interface_type);
+ fwts_log_info_simp_int(fw, " Protocol Identifier ", mchi->protocol_identifier);
fwts_log_info_verbatim(fw, " Protocol Data: "
"0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8,
mchi->protocol_data[0], mchi->protocol_data[1],
@@ -57,21 +57,21 @@ static int mchi_test1(fwts_framework *fw)
"0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8,
mchi->protocol_data[4], mchi->protocol_data[5],
mchi->protocol_data[6], mchi->protocol_data[7]);
- fwts_log_info_verbatim(fw, " Interrupt Type: 0x%2.2" PRIx8, mchi->interrupt_type);
- fwts_log_info_verbatim(fw, " GPE: 0x%2.2" PRIx8, mchi->gpe);
- fwts_log_info_verbatim(fw, " PCI Device Flag: 0x%2.2" PRIx8, mchi->pci_device_flag);
- fwts_log_info_verbatim(fw, " Global System Interrupt: 0x%8.8" PRIx32, mchi->global_system_interrupt);
+ fwts_log_info_simp_int(fw, " Interrupt Type: ", mchi->interrupt_type);
+ fwts_log_info_simp_int(fw, " GPE: ", mchi->gpe);
+ fwts_log_info_simp_int(fw, " PCI Device Flag: ", mchi->pci_device_flag);
+ fwts_log_info_simp_int(fw, " Global System Interrupt: ", mchi->global_system_interrupt);
fwts_log_info_verbatim(fw, " Base Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, mchi->base_address.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, mchi->base_address.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, mchi->base_address.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, mchi->base_address.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, mchi->base_address.address);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", mchi->base_address.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", mchi->base_address.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", mchi->base_address.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", mchi->base_address.access_width);
+ fwts_log_info_simp_int(fw, " Address ", mchi->base_address.address);
if ((mchi->pci_device_flag & 1) == 1) {
- fwts_log_info_verbatim(fw, " PCI Segment Group: 0x%2.2" PRIx8, mchi->bytes[0]);
- fwts_log_info_verbatim(fw, " PCI Bus Number: 0x%2.2" PRIx8, mchi->bytes[1]);
- fwts_log_info_verbatim(fw, " PCI Device Number: 0x%2.2" PRIx8, mchi->bytes[2]);
- fwts_log_info_verbatim(fw, " PCI Function Number: 0x%2.2" PRIx8, mchi->bytes[3]);
+ fwts_log_info_simp_int(fw, " PCI Segment Group: ", mchi->bytes[0]);
+ fwts_log_info_simp_int(fw, " PCI Bus Number: ", mchi->bytes[1]);
+ fwts_log_info_simp_int(fw, " PCI Device Number: ", mchi->bytes[2]);
+ fwts_log_info_simp_int(fw, " PCI Function Number: ", mchi->bytes[3]);
} else {
/* Zero -> UIDS */
fwts_log_info_verbatim(fw, " UID Bytes 1-4: "
diff --git a/src/acpi/mpst/mpst.c b/src/acpi/mpst/mpst.c
index 156fded8..6914842d 100644
--- a/src/acpi/mpst/mpst.c
+++ b/src/acpi/mpst/mpst.c
@@ -42,14 +42,14 @@ static int mpst_test1(fwts_framework *fw)
((uint32_t) mpst->reserved[2] << 16);
fwts_log_info_verbatim(fw, "MPST Table:");
- fwts_log_info_verbatim(fw, " Communication Channel ID: 0x%2.2" PRIx8, mpst->channel_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, reserved);
+ fwts_log_info_simp_int(fw, " Communication Channel ID: ", mpst->channel_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved);
fwts_acpi_reserved_zero_check(fw, "MPST", "Reserved", reserved, sizeof(reserved), &passed);
node_list = (fwts_acpi_table_mpst_power_node_list *) (table->data + sizeof(fwts_acpi_table_mpst));
- fwts_log_info_verbatim(fw, " Memory Power Node Count: 0x%4.4" PRIx16, node_list->count);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, node_list->reserved);
+ fwts_log_info_simp_int(fw, " Memory Power Node Count: ", node_list->count);
+ fwts_log_info_simp_int(fw, " Reserved: ", node_list->reserved);
fwts_acpi_reserved_zero_check(fw, "MPST", "Reserved", node_list->reserved, sizeof(node_list->reserved), &passed);
@@ -66,14 +66,14 @@ static int mpst_test1(fwts_framework *fw)
uint32_t node_length;
fwts_log_info_verbatim(fw, " MPST Power Node:");
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, power_node->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, power_node->reserved);
- fwts_log_info_verbatim(fw, " Memory Power Node Id: 0x%4.4" PRIx16, power_node->node_id);
- fwts_log_info_verbatim(fw, " Power Node Length: 0x%8.8" PRIx32, power_node->length);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, power_node->range_address);
- fwts_log_info_verbatim(fw, " Memory Length: 0x%16.16" PRIx64, power_node->range_length);
- fwts_log_info_verbatim(fw, " Number of Power States: 0x%8.8" PRIx32, power_node->num_states);
- fwts_log_info_verbatim(fw, " Number of Physical Components: 0x%8.8" PRIx32, power_node->num_components);
+ fwts_log_info_simp_int(fw, " Flags: ", power_node->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", power_node->reserved);
+ fwts_log_info_simp_int(fw, " Memory Power Node Id: ", power_node->node_id);
+ fwts_log_info_simp_int(fw, " Power Node Length: ", power_node->length);
+ fwts_log_info_simp_int(fw, " Base Address: ", power_node->range_address);
+ fwts_log_info_simp_int(fw, " Memory Length: ", power_node->range_length);
+ fwts_log_info_simp_int(fw, " Number of Power States: ", power_node->num_states);
+ fwts_log_info_simp_int(fw, " Number of Physical Components: ", power_node->num_components);
fwts_acpi_reserved_bits_check(fw, "MPST", "Power Node Flags", power_node->flags, sizeof(power_node->flags), 3, 7, &passed);
fwts_acpi_reserved_zero_check(fw, "MPST", "Reserved", power_node->reserved, sizeof(power_node->reserved), &passed);
@@ -100,8 +100,8 @@ static int mpst_test1(fwts_framework *fw)
for (j = 0; j < power_node->num_states; j++) {
fwts_acpi_table_mpst_power_state *state = (fwts_acpi_table_mpst_power_state *) (table->data + node_offset);
- fwts_log_info_verbatim(fw, " Power State Value: 0x%2.2" PRIx8, state->value);
- fwts_log_info_verbatim(fw, " Power State Information Index: 0x%2.2" PRIx8, state->info_index);
+ fwts_log_info_simp_int(fw, " Power State Value: ", state->value);
+ fwts_log_info_simp_int(fw, " Power State Information Index: ", state->info_index);
node_offset += sizeof(fwts_acpi_table_mpst_power_state);
}
@@ -114,14 +114,14 @@ static int mpst_test1(fwts_framework *fw)
for (j = 0; j < power_node->num_components; j++) {
fwts_acpi_table_mpst_component *component = (fwts_acpi_table_mpst_component *) (table->data + node_offset);
- fwts_log_info_verbatim(fw, " Physical Component Id: 0x%2.2" PRIx8, component->id);
+ fwts_log_info_simp_int(fw, " Physical Component Id: ", component->id);
node_offset += sizeof(fwts_acpi_table_mpst_component);
}
}
char_list = (fwts_acpi_table_mpst_power_char_list *) (table->data + node_offset);
- fwts_log_info_verbatim(fw, " Memory Characteristics Count: 0x%4.4" PRIx16, char_list->count);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, char_list->reserved);
+ fwts_log_info_simp_int(fw, " Memory Characteristics Count: ", char_list->count);
+ fwts_log_info_simp_int(fw, " Reserved: ", char_list->reserved);
fwts_acpi_reserved_zero_check(fw, "MPST", "Reserved", char_list->reserved, sizeof(char_list->reserved), &passed);
@@ -137,13 +137,13 @@ static int mpst_test1(fwts_framework *fw)
fwts_acpi_table_mpst_power_char *power_char = (fwts_acpi_table_mpst_power_char *) (table->data + node_offset);
fwts_log_info_verbatim(fw, " MPST Power Characteristics:");
- fwts_log_info_verbatim(fw, " Power State Structure ID: 0x%2.2" PRIx8, power_char->structure_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, power_char->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, power_char->reserved1);
- fwts_log_info_verbatim(fw, " Average Power Consumed: 0x%8.8" PRIx32, power_char->average_power);
- fwts_log_info_verbatim(fw, " Relative Power Saving: 0x%8.8" PRIx32, power_char->power_saving);
- fwts_log_info_verbatim(fw, " Exit Latency: 0x%16.16" PRIx64, power_char->exit_latency);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, power_char->reserved2);
+ fwts_log_info_simp_int(fw, " Power State Structure ID: ", power_char->structure_id);
+ fwts_log_info_simp_int(fw, " Flags: ", power_char->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", power_char->reserved1);
+ fwts_log_info_simp_int(fw, " Average Power Consumed: ", power_char->average_power);
+ fwts_log_info_simp_int(fw, " Relative Power Saving: ", power_char->power_saving);
+ fwts_log_info_simp_int(fw, " Exit Latency: ", power_char->exit_latency);
+ fwts_log_info_simp_int(fw, " Reserved: ", power_char->reserved2);
if ((power_char->structure_id & 0x3F) != 1) {
passed = false;
diff --git a/src/acpi/msct/msct.c b/src/acpi/msct/msct.c
index 722f9850..168e7a4b 100644
--- a/src/acpi/msct/msct.c
+++ b/src/acpi/msct/msct.c
@@ -40,14 +40,10 @@ static int msct_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "MSCT Max System Characteristics Table:");
- fwts_log_info_verbatim(fw, " Proximity Offset: 0x%8.8" PRIx32,
- msct->proximity_offset);
- fwts_log_info_verbatim(fw, " Max Proximity Domains: 0x%8.8" PRIx32,
- msct->max_proximity_domains);
- fwts_log_info_verbatim(fw, " Max Clock Domains: 0x%8.8" PRIx32,
- msct->max_clock_domains);
- fwts_log_info_verbatim(fw, " Max Physical Address: 0x%16.16" PRIx64,
- msct->max_address);
+ fwts_log_info_simp_int(fw, " Proximity Offset: ", msct->proximity_offset);
+ fwts_log_info_simp_int(fw, " Max Proximity Domains: ", msct->max_proximity_domains);
+ fwts_log_info_simp_int(fw, " Max Clock Domains: ", msct->max_clock_domains);
+ fwts_log_info_simp_int(fw, " Max Physical Address: ", msct->max_address);
if (msct->proximity_offset < 0x38) {
fwts_failed(fw, LOG_LEVEL_MEDIUM,
diff --git a/src/acpi/msdm/msdm.c b/src/acpi/msdm/msdm.c
index d08264bb..32cc64a2 100644
--- a/src/acpi/msdm/msdm.c
+++ b/src/acpi/msdm/msdm.c
@@ -45,10 +45,10 @@ static int msdm_test1(fwts_framework *fw)
passed = false;
goto done;
}
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, msdm->reserved);
- fwts_log_info_verbatim(fw, " Data Type: 0x%8.8" PRIx32, msdm->data_type);
- fwts_log_info_verbatim(fw, " Data Reserved: 0x%8.8" PRIx32, msdm->data_reserved);
- fwts_log_info_verbatim(fw, " Data Length: 0x%8.8" PRIx32, msdm->data_length);
+ fwts_log_info_simp_int(fw, " Reserved: ", msdm->reserved);
+ fwts_log_info_simp_int(fw, " Data Type: ", msdm->data_type);
+ fwts_log_info_simp_int(fw, " Data Reserved: ", msdm->data_reserved);
+ fwts_log_info_simp_int(fw, " Data Length: ", msdm->data_length);
fwts_acpi_reserved_zero_check(fw, "MSDM", "Reserved", msdm->reserved, sizeof(msdm->reserved), &passed);
fwts_acpi_reserved_zero_check(fw, "MSDM", "Data Reserved", msdm->data_reserved, sizeof(msdm->data_reserved), &passed);
diff --git a/src/acpi/nfit/nfit.c b/src/acpi/nfit/nfit.c
index aa2d9667..a167bf96 100644
--- a/src/acpi/nfit/nfit.c
+++ b/src/acpi/nfit/nfit.c
@@ -78,9 +78,9 @@ static bool scan_nfit_smbios(fwts_framework *fw, int len, uint8_t *table)
fwts_dmi_header *hdr = (fwts_dmi_header *) table;
fwts_log_info_verbatim(fw, " NFIT SMBIOS Entry %d:", entry++);
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, hdr->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, hdr->length);
- fwts_log_info_verbatim(fw, " Handle: 0x%4.4" PRIx16, hdr->handle);
+ fwts_log_info_simp_int(fw, " Type: ", hdr->type);
+ fwts_log_info_simp_int(fw, " Length: ", hdr->length);
+ fwts_log_info_simp_int(fw, " Handle: ", hdr->handle);
if (hdr->length < 4) {
fwts_failed(fw, LOG_LEVEL_HIGH, "NFIT_SMBIOS_EntryLength",
@@ -123,7 +123,7 @@ static int nfit_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "NFIT NVDIMM Firmware Interface Table:");
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, nfit->reserved);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit->reserved);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "NFIT", "Reserved", nfit->reserved, sizeof(nfit->reserved), &passed);
@@ -135,8 +135,8 @@ static int nfit_test1(fwts_framework *fw)
uint64_t reserved_passed = 0;
fwts_log_info_verbatim(fw, " NFIT Subtable:");
- fwts_log_info_verbatim(fw, " Type: 0x%4.4" PRIx16, entry->type);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, entry->length);
+ fwts_log_info_simp_int(fw, " Type: ", entry->type);
+ fwts_log_info_simp_int(fw, " Length: ", entry->length);
if (entry->length == 0) {
passed = false;
@@ -162,14 +162,14 @@ static int nfit_test1(fwts_framework *fw)
fwts_guid_buf_to_str(nfit_struct->range_guid, guid_str, sizeof(guid_str));
- fwts_log_info_verbatim(fw, " SPA Range Structure Index: 0x%4.4" PRIx16, nfit_struct->range_index);
- fwts_log_info_verbatim(fw, " Flags: 0x%4.4" PRIx16, nfit_struct->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, nfit_struct->reserved);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, nfit_struct->proximity_domain);
+ fwts_log_info_simp_int(fw, " SPA Range Structure Index: ", nfit_struct->range_index);
+ fwts_log_info_simp_int(fw, " Flags: ", nfit_struct->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit_struct->reserved);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", nfit_struct->proximity_domain);
fwts_log_info_verbatim(fw, " Address Range Type GUID: %s", guid_str);
- fwts_log_info_verbatim(fw, " System Physical Address Range Base: 0x%16.16" PRIx64, nfit_struct->address);
- fwts_log_info_verbatim(fw, " System Physical Address Range Length: 0x%16.16" PRIx64, nfit_struct->length);
- fwts_log_info_verbatim(fw, " Address Range Memory Mapping Attribute: 0x%16.16" PRIx64, nfit_struct->memory_mapping);
+ fwts_log_info_simp_int(fw, " System Physical Address Range Base: ", nfit_struct->address);
+ fwts_log_info_simp_int(fw, " System Physical Address Range Length: ", nfit_struct->length);
+ fwts_log_info_simp_int(fw, " Address Range Memory Mapping Attribute: ", nfit_struct->memory_mapping);
/* SPA Range Structure Index can be 0 for Virtual CD Region and
Virtual Disk Region (both volatile and persistent) */
@@ -255,18 +255,18 @@ static int nfit_test1(fwts_framework *fw)
break;
}
- fwts_log_info_verbatim(fw, " NFIT Device Handle: 0x%8.8" PRIx32, nfit_struct->device_handle);
- fwts_log_info_verbatim(fw, " NVDIMM Physical ID: 0x%4.4" PRIx16, nfit_struct->physical_id);
- fwts_log_info_verbatim(fw, " NVDIMM Region ID: 0x%4.4" PRIx16, nfit_struct->region_id);
- fwts_log_info_verbatim(fw, " SPA Range Structure Index: 0x%4.4" PRIx16, nfit_struct->range_index);
- fwts_log_info_verbatim(fw, " NVDIMM Control Region Structure Index: 0x%4.4" PRIx16, nfit_struct->region_index);
- fwts_log_info_verbatim(fw, " NVDIMM Region Size: 0x%16.16" PRIx64, nfit_struct->region_size);
- fwts_log_info_verbatim(fw, " Region Offset: 0x%16.16" PRIx64, nfit_struct->region_offset);
- fwts_log_info_verbatim(fw, " NVDIMM Physical Address Region Base: 0x%16.16" PRIx64, nfit_struct->address);
- fwts_log_info_verbatim(fw, " Interleave Structure Index: 0x%4.4" PRIx16, nfit_struct->interleave_index);
- fwts_log_info_verbatim(fw, " Interleave Ways: 0x%4.4" PRIx16, nfit_struct->interleave_ways);
- fwts_log_info_verbatim(fw, " NVDIMM State Flags: 0x%4.4" PRIx16, nfit_struct->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, nfit_struct->reserved);
+ fwts_log_info_simp_int(fw, " NFIT Device Handle: ", nfit_struct->device_handle);
+ fwts_log_info_simp_int(fw, " NVDIMM Physical ID: ", nfit_struct->physical_id);
+ fwts_log_info_simp_int(fw, " NVDIMM Region ID: ", nfit_struct->region_id);
+ fwts_log_info_simp_int(fw, " SPA Range Structure Index: ", nfit_struct->range_index);
+ fwts_log_info_simp_int(fw, " NVDIMM Control Region Structure Index: ", nfit_struct->region_index);
+ fwts_log_info_simp_int(fw, " NVDIMM Region Size: ", nfit_struct->region_size);
+ fwts_log_info_simp_int(fw, " Region Offset: ", nfit_struct->region_offset);
+ fwts_log_info_simp_int(fw, " NVDIMM Physical Address Region Base: ", nfit_struct->address);
+ fwts_log_info_simp_int(fw, " Interleave Structure Index: ", nfit_struct->interleave_index);
+ fwts_log_info_simp_int(fw, " Interleave Ways: ", nfit_struct->interleave_ways);
+ fwts_log_info_simp_int(fw, " NVDIMM State Flags: ", nfit_struct->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit_struct->reserved);
fwts_acpi_reserved_bits_check(fw, "NFIT", "NVDIMM State Flags", nfit_struct->flags, sizeof(nfit_struct->flags), 7, 15, &passed);
@@ -285,10 +285,10 @@ static int nfit_test1(fwts_framework *fw)
break;
}
- fwts_log_info_verbatim(fw, " Interleave Structure Index: 0x%4.4" PRIx16, nfit_struct->interleave_index);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, nfit_struct->reserved);
- fwts_log_info_verbatim(fw, " Number of Lines Described: 0x%8.8" PRIx32, nfit_struct->line_count);
- fwts_log_info_verbatim(fw, " Line Size: 0x%8.8" PRIx32, nfit_struct->line_size);
+ fwts_log_info_simp_int(fw, " Interleave Structure Index: ", nfit_struct->interleave_index);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit_struct->reserved);
+ fwts_log_info_simp_int(fw, " Number of Lines Described: ", nfit_struct->line_count);
+ fwts_log_info_simp_int(fw, " Line Size: ", nfit_struct->line_size);
ret = check_length(fw, entry->length,
FWTS_ACPI_NFIT_MINLEN_INTERLEAVE +
@@ -326,7 +326,7 @@ static int nfit_test1(fwts_framework *fw)
break;
}
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, nfit_struct->reserved);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit_struct->reserved);
if (nfit_struct->reserved != 0)
reserved_passed = nfit_struct->reserved;
@@ -347,19 +347,19 @@ static int nfit_test1(fwts_framework *fw)
break;
}
- fwts_log_info_verbatim(fw, " Vendor ID: 0x%4.4" PRIx16, nfit_struct->vendor_id);
- fwts_log_info_verbatim(fw, " Device ID: 0x%4.4" PRIx16, nfit_struct->device_id);
- fwts_log_info_verbatim(fw, " Revision ID: 0x%4.4" PRIx16, nfit_struct->revision_id);
- fwts_log_info_verbatim(fw, " Subsystem Vendor ID: 0x%4.4" PRIx16, nfit_struct->subsystem_vendor_id);
- fwts_log_info_verbatim(fw, " Subsystem Device ID: 0x%4.4" PRIx16, nfit_struct->subsystem_device_id);
- fwts_log_info_verbatim(fw, " Subsystem Revision ID: 0x%4.4" PRIx16, nfit_struct->subsystem_revision_id);
- fwts_log_info_verbatim(fw, " Valid Fields: 0x%2.2" PRIx8, nfit_struct->valid_fields);
- fwts_log_info_verbatim(fw, " Manufacturing Location: 0x%2.2" PRIx8, nfit_struct->manufacturing_location);
- fwts_log_info_verbatim(fw, " Manufacturing Date: 0x%4.4" PRIx16, nfit_struct->manufacturing_date);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, nfit_struct->reserved);
- fwts_log_info_verbatim(fw, " Serial Number: 0x%8.8" PRIx32, nfit_struct->serial_number);
- fwts_log_info_verbatim(fw, " Region Format Interface Code: 0x%4.4" PRIx16, nfit_struct->interface_code);
- fwts_log_info_verbatim(fw, " Number of Block Control Windows: 0x%4.4" PRIx16, nfit_struct->windows_num);
+ fwts_log_info_simp_int(fw, " Vendor ID: ", nfit_struct->vendor_id);
+ fwts_log_info_simp_int(fw, " Device ID: ", nfit_struct->device_id);
+ fwts_log_info_simp_int(fw, " Revision ID: ", nfit_struct->revision_id);
+ fwts_log_info_simp_int(fw, " Subsystem Vendor ID: ", nfit_struct->subsystem_vendor_id);
+ fwts_log_info_simp_int(fw, " Subsystem Device ID: ", nfit_struct->subsystem_device_id);
+ fwts_log_info_simp_int(fw, " Subsystem Revision ID: ", nfit_struct->subsystem_revision_id);
+ fwts_log_info_simp_int(fw, " Valid Fields: ", nfit_struct->valid_fields);
+ fwts_log_info_simp_int(fw, " Manufacturing Location: ", nfit_struct->manufacturing_location);
+ fwts_log_info_simp_int(fw, " Manufacturing Date: ", nfit_struct->manufacturing_date);
+ fwts_log_info_simp_int(fw, " Reserved: ", nfit_struct->reserved);
+ fwts_log_info_simp_int(fw, " Serial Number: ", nfit_struct->serial_number);
+ fwts_log_info_simp_int(fw, " Region Format Interface Code: ", nfit_struct->interface_code);
+ fwts_log_info_simp_int(fw, " Number of Block Control Windows: ", nfit_struct->windows_num);
if (nfit_struct->revision_id & 0xFF00) {
passed = false;
@@ -395,16 +395,16 @@ static int nfit_test1(fwts_framework *fw)
if (reserved1 != 0)
reserved_passed = reserved1;
- fwts_log_info_verbatim(fw, " Size of Block Control Window: 0x%16.16" PRIx64, nfit_struct->window_size);
- fwts_log_info_verbatim(fw, " Command Register Offset: 0x%16.16" PRIx64, nfit_struct->command_offset);
- fwts_log_info_verbatim(fw, " Size of Command Register: 0x%16.16" PRIx64, nfit_struct->command_size);
- fwts_log_info_verbatim(fw, " Status RegisterOffset: 0x%16.16" PRIx64, nfit_struct->status_offset);
- fwts_log_info_verbatim(fw, " Size of Status Register: 0x%16.16" PRIx64, nfit_struct->status_size);
- fwts_log_info_verbatim(fw, " NVDIMM Control Region Flag: 0x%4.4" PRIx16, nfit_struct->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, reserved1);
+ fwts_log_info_simp_int(fw, " Size of Block Control Window: ", nfit_struct->window_size);
+ fwts_log_info_simp_int(fw, " Command Register Offset: ", nfit_struct->command_offset);
+ fwts_log_info_simp_int(fw, " Size of Command Register: ", nfit_struct->command_size);
+ fwts_log_info_simp_int(fw, " Status RegisterOffset: ", nfit_struct->status_offset);
+ fwts_log_info_simp_int(fw, " Size of Status Register: ", nfit_struct->status_size);
+ fwts_log_info_simp_int(fw, " NVDIMM Control Region Flag: ", nfit_struct->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved1);
fwts_acpi_reserved_bits_check(fw, "NFIT", "NVDIMM Control Region Flags", nfit_struct->flags, sizeof(nfit_struct->flags), 1, 15, &passed);
- fwts_log_info_verbatim(fw, " NVDIMM Control Region Structure Index: 0x%4.4" PRIx16, nfit_struct->region_index);
+ fwts_log_info_simp_int(fw, " NVDIMM Control Region Structure Index: ", nfit_struct->region_index);
}
} else if (entry->type == FWTS_ACPI_NFIT_TYPE_DATA_REGION) {
@@ -418,12 +418,12 @@ static int nfit_test1(fwts_framework *fw)
break;
}
- fwts_log_info_verbatim(fw, " NVDIMM Control Region Structure Index: 0x%4.4" PRIx16, nfit_struct->region_index);
- fwts_log_info_verbatim(fw, " Number of Block Data Windows: 0x%4.4" PRIx16, nfit_struct->window_num);
- fwts_log_info_verbatim(fw, " Block Data Window Start Offset: 0x%16.16" PRIx64, nfit_struct->window_offset);
- fwts_log_info_verbatim(fw, " Size of Block Data Window: 0x%16.16" PRIx64, nfit_struct->window_size);
- fwts_log_info_verbatim(fw, " NBlock Accessible Memory Capacity: 0x%16.16" PRIx64, nfit_struct->capacity);
- fwts_log_info_verbatim(fw, " Beginning address of First Block: 0x%16.16" PRIx64, nfit_struct->start_address);
+ fwts_log_info_simp_int(fw, " NVDIMM Control Region Structure Index: ", nfit_struct->region_index);
+ fwts_log_info_simp_int(fw, " Number of Block Data Windows: ", nfit_struct->window_num);
+ fwts_log_info_simp_int(fw, " Block Data Window Start Offset: ", nfit_struct->window_offset);
+ fwts_log_info_simp_int(fw, " Size of Block Data Window: ", nfit_struct->window_size);
+ fwts_log_info_simp_int(fw, " NBlock Accessible Memory Capacity: ", nfit_struct->capacity);
+ fwts_log_info_simp_int(fw, " Beginning address of First Block: ", nfit_struct->start_address);
if (nfit_struct->region_index == 0) {
passed = false;
@@ -449,9 +449,9 @@ static int nfit_test1(fwts_framework *fw)
((uint64_t) nfit_struct->reserved[2] << 16) + ((uint64_t) nfit_struct->reserved[3] << 24) +
((uint64_t) nfit_struct->reserved[4] << 32) + ((uint64_t) nfit_struct->reserved[5] << 40);
- fwts_log_info_verbatim(fw, " NFIT Device Handle: 0x%8.8" PRIx32, nfit_struct->device_handle);
- fwts_log_info_verbatim(fw, " Number of Flush Hint Addresses: 0x%4.4" PRIx16, nfit_struct->hint_count);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, reserved);
+ fwts_log_info_simp_int(fw, " NFIT Device Handle: ", nfit_struct->device_handle);
+ fwts_log_info_simp_int(fw, " Number of Flush Hint Addresses: ", nfit_struct->hint_count);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved);
ret = check_length(fw, entry->length,
FWTS_ACPI_NFIT_MINLEN_FLUSH_ADDRESS +
@@ -463,7 +463,7 @@ static int nfit_test1(fwts_framework *fw)
}
for (i = 0; i < nfit_struct->hint_count; i++)
- fwts_log_info_verbatim(fw, " Flush Hint Address: 0x%16.16" PRIx64, nfit_struct->hint_address[i]);
+ fwts_log_info_simp_int(fw, " Flush Hint Address: ", nfit_struct->hint_address[i]);
if (reserved != 0)
reserved_passed = reserved;
@@ -483,10 +483,10 @@ static int nfit_test1(fwts_framework *fw)
reserved1 = (uint32_t) nfit_struct->reserved1[0] + ((uint32_t) nfit_struct->reserved1[1] << 8) +
((uint32_t) nfit_struct->reserved1[2] << 16);
- fwts_log_info_verbatim(fw, " Highest Valid Capability: 0x%2.2" PRIx8, nfit_struct->highest_valid_cap);
- fwts_log_info_verbatim(fw, " Reserved1: 0x%8.8" PRIx32, reserved1);
- fwts_log_info_verbatim(fw, " Capabilities: 0x%8.8" PRIx32, nfit_struct->cap);
- fwts_log_info_verbatim(fw, " Reserved2: 0x%8.8" PRIx32, nfit_struct->reserved2);
+ fwts_log_info_simp_int(fw, " Highest Valid Capability: ", nfit_struct->highest_valid_cap);
+ fwts_log_info_simp_int(fw, " Reserved1: ", reserved1);
+ fwts_log_info_simp_int(fw, " Capabilities: ", nfit_struct->cap);
+ fwts_log_info_simp_int(fw, " Reserved2: ", nfit_struct->reserved2);
fwts_acpi_reserved_zero_check(fw, "NFIT", "Reserved1", reserved1, sizeof(reserved1), &passed);
fwts_acpi_reserved_bits_check(fw, "NFIT", "Capabilities", nfit_struct->cap, sizeof(nfit_struct->cap), 3, 31, &passed);
diff --git a/src/acpi/pcc/pcc.c b/src/acpi/pcc/pcc.c
index e3f50b47..8eb71caf 100644
--- a/src/acpi/pcc/pcc.c
+++ b/src/acpi/pcc/pcc.c
@@ -123,20 +123,20 @@ static void pcc_check_pcc_header(
return;
}
- fwts_log_info_verbatim(fw, "PCC header at 0x%" PRIx64 ".", addr);
- fwts_log_info_verbatim(fw, " Signature: 0x%" PRIx32, hdr->signature);
- fwts_log_info_verbatim(fw, " Length: 0x%" PRIx16, hdr->length);
- fwts_log_info_verbatim(fw, " Major: 0x%" PRIx8, hdr->major);
- fwts_log_info_verbatim(fw, " Minor: 0x%" PRIx8, hdr->minor);
- fwts_log_info_verbatim(fw, " Features: 0x%" PRIx32, hdr->features);
- fwts_log_info_verbatim(fw, " Command: 0x%" PRIx16, hdr->command);
- fwts_log_info_verbatim(fw, " Status: 0x%" PRIx16, hdr->status);
- fwts_log_info_verbatim(fw, " Latency: 0x%" PRIx32, hdr->latency);
- fwts_log_info_verbatim(fw, " Minimum Time: 0x%" PRIx32, hdr->minimum_time);
- fwts_log_info_verbatim(fw, " Maximum Time: 0x%" PRIx32, hdr->maximum_time);
- fwts_log_info_verbatim(fw, " Nominal: 0x%" PRIx32, hdr->nominal);
- fwts_log_info_verbatim(fw, " Throttled Freq.: 0x%" PRIx32, hdr->throttled_frequency);
- fwts_log_info_verbatim(fw, " Minimum Freq.: 0x%" PRIx32, hdr->minimum_frequency);
+ fwts_log_info_simp_int(fw, "PCC header at ", addr);
+ fwts_log_info_simp_int(fw, " Signature: ", hdr->signature);
+ fwts_log_info_simp_int(fw, " Length: ", hdr->length);
+ fwts_log_info_simp_int(fw, " Major: ", hdr->major);
+ fwts_log_info_simp_int(fw, " Minor: ", hdr->minor);
+ fwts_log_info_simp_int(fw, " Features: ", hdr->features);
+ fwts_log_info_simp_int(fw, " Command: ", hdr->command);
+ fwts_log_info_simp_int(fw, " Status: ", hdr->status);
+ fwts_log_info_simp_int(fw, " Latency: ", hdr->latency);
+ fwts_log_info_simp_int(fw, " Minimum Time: ", hdr->minimum_time);
+ fwts_log_info_simp_int(fw, " Maximum Time: ", hdr->maximum_time);
+ fwts_log_info_simp_int(fw, " Nominal: ", hdr->nominal);
+ fwts_log_info_simp_int(fw, " Throttled Freq.: ", hdr->throttled_frequency);
+ fwts_log_info_simp_int(fw, " Minimum Freq.: ", hdr->minimum_frequency);
fwts_munmap(hdr, (size_t)length);
fwts_log_nl(fw);
@@ -191,15 +191,15 @@ static void pcc_check_shared_memory_region(
pcc_mr = (fwts_pcc_memory_resource *)pcc_obj->Buffer.Pointer;
fwts_log_info_verbatim(fw, "PCC Memory Resource (Shared Memory Region) for %s:", name);
- fwts_log_info_verbatim(fw, " Descriptor: 0x%" PRIx8, pcc_mr->descriptor);
- fwts_log_info_verbatim(fw, " Length: 0x%" PRIx8, pcc_mr->length);
- fwts_log_info_verbatim(fw, " Space ID: 0x%" PRIx8, pcc_mr->space_id);
- fwts_log_info_verbatim(fw, " Resource Usage: 0x%" PRIx8, pcc_mr->resource_usage);
- fwts_log_info_verbatim(fw, " Type Specific: 0x%" PRIx8, pcc_mr->type_specific);
- fwts_log_info_verbatim(fw, " Minimum: 0x%" PRIx64, pcc_mr->minimum);
- fwts_log_info_verbatim(fw, " Maximum: 0x%" PRIx64, pcc_mr->maximum);
- fwts_log_info_verbatim(fw, " Translation Offset: 0x%" PRIx64, pcc_mr->translation_offset);
- fwts_log_info_verbatim(fw, " Address Length: 0x%" PRIx64, pcc_mr->address_length);
+ fwts_log_info_simp_int(fw, " Descriptor: ", pcc_mr->descriptor);
+ fwts_log_info_simp_int(fw, " Length: ", pcc_mr->length);
+ fwts_log_info_simp_int(fw, " Space ID: ", pcc_mr->space_id);
+ fwts_log_info_simp_int(fw, " Resource Usage: ", pcc_mr->resource_usage);
+ fwts_log_info_simp_int(fw, " Type Specific: ", pcc_mr->type_specific);
+ fwts_log_info_simp_int(fw, " Minimum: ", pcc_mr->minimum);
+ fwts_log_info_simp_int(fw, " Maximum: ", pcc_mr->maximum);
+ fwts_log_info_simp_int(fw, " Translation Offset: ", pcc_mr->translation_offset);
+ fwts_log_info_simp_int(fw, " Address Length: ", pcc_mr->address_length);
if (pcc_mr->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
fwts_failed(fw, LOG_LEVEL_HIGH, "PCCMemoryResourceSpaceIdWrongType",
@@ -291,13 +291,13 @@ static void pcc_check_doorbell_address(
pcc_rr = (fwts_pcc_register_resource *)pcc_obj->Buffer.Pointer;
fwts_log_info_verbatim(fw, "PCC Register Resource (Doorbell) for %s:", name);
- fwts_log_info_verbatim(fw, " Descriptor: 0x%" PRIx8, pcc_rr->descriptor);
- fwts_log_info_verbatim(fw, " Length: 0x%" PRIx8, pcc_rr->length);
- fwts_log_info_verbatim(fw, " Space ID: 0x%" PRIx8, pcc_rr->space_id);
- fwts_log_info_verbatim(fw, " Bit Width: 0x%" PRIx8, pcc_rr->bit_width);
- fwts_log_info_verbatim(fw, " Bit Offset: 0x%" PRIx8, pcc_rr->bit_offset);
- fwts_log_info_verbatim(fw, " Access Size: 0x%" PRIx8, pcc_rr->access_size);
- fwts_log_info_verbatim(fw, " Address: 0x%" PRIx64, pcc_rr->address);
+ fwts_log_info_simp_int(fw, " Descriptor: ", pcc_rr->descriptor);
+ fwts_log_info_simp_int(fw, " Length: ", pcc_rr->length);
+ fwts_log_info_simp_int(fw, " Space ID: ", pcc_rr->space_id);
+ fwts_log_info_simp_int(fw, " Bit Width: ", pcc_rr->bit_width);
+ fwts_log_info_simp_int(fw, " Bit Offset: ", pcc_rr->bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size: ", pcc_rr->access_size);
+ fwts_log_info_simp_int(fw, " Address: ", pcc_rr->address);
if (pcc_rr->space_id != ACPI_ADR_SPACE_SYSTEM_IO) {
fwts_failed(fw, LOG_LEVEL_HIGH, "PCCRegisterResourceSpaceIdWrongType",
@@ -340,7 +340,7 @@ static void pcc_check_doorbell_preserve_mask(
}
fwts_log_info_verbatim(fw, "PCC Doorbell Preserve Mask for %s:", name);
- fwts_log_info_verbatim(fw, " Preserve Mask: 0x%" PRIx64, pcc_obj->Integer.Value);
+ fwts_log_info_simp_int(fw, " Preserve Mask: ", pcc_obj->Integer.Value);
fwts_log_nl(fw);
}
@@ -360,7 +360,7 @@ static void pcc_check_doorbell_write_mask(
}
fwts_log_info_verbatim(fw, "PCC Doorbell Write Mask for %s:", name);
- fwts_log_info_verbatim(fw, " Write Mask: 0x%" PRIx64, pcc_obj->Integer.Value);
+ fwts_log_info_simp_int(fw, " Write Mask: ", pcc_obj->Integer.Value);
fwts_log_nl(fw);
if (pcc_obj->Integer.Value == 0) {
diff --git a/src/acpi/pcct/pcct.c b/src/acpi/pcct/pcct.c
index e2e40164..acffd6d5 100644
--- a/src/acpi/pcct/pcct.c
+++ b/src/acpi/pcct/pcct.c
@@ -43,11 +43,11 @@ static void gas_messages(fwts_framework *fw, uint8_t type, fwts_acpi_gas *gas, b
{
char label[20];
- fwts_log_info_verbatim(fw, " Address Space ID 0x%2.2" PRIx8, gas->address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, gas->register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, gas->register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, gas->access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, gas->address);
+ fwts_log_info_simp_int(fw, " Address Space ID ", gas->address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", gas->register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", gas->register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", gas->access_width);
+ fwts_log_info_simp_int(fw, " Address ", gas->address);
snprintf(label, 20, "Subspace Type % " PRId8, type);
fwts_acpi_space_id_check(fw, "PCCT", label, passed, gas->address_space_id, 3,
@@ -60,7 +60,7 @@ static void memory_length(fwts_framework *fw, uint8_t type, uint64_t memory_rang
{
switch (type) {
case 0 ... 2:
- fwts_log_info_verbatim(fw, " Length: 0x%16.16" PRIx64, memory_range);
+ fwts_log_info_simp_int(fw, " Length: ", memory_range);
if (memory_range <= min_length) {
*passed = false;
fwts_failed(fw, LOG_LEVEL_HIGH,
@@ -70,7 +70,7 @@ static void memory_length(fwts_framework *fw, uint8_t type, uint64_t memory_rang
}
break;
case 3 ... 4:
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, (uint32_t)memory_range);
+ fwts_log_info_simp_int(fw, " Length: ", (uint32_t)memory_range);
if (memory_range <= min_length) {
*passed = false;
fwts_failed(fw, LOG_LEVEL_HIGH,
@@ -91,20 +91,20 @@ static void generic_comm_test(fwts_framework *fw, fwts_acpi_table_pcct_subspace_
((uint64_t) entry->reserved[2] << 16) + ((uint64_t) entry->reserved[3] << 24) +
((uint64_t) entry->reserved[4] << 32) + ((uint64_t) entry->reserved[5] << 40);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, reserved);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, entry->base_address);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved);
+ fwts_log_info_simp_int(fw, " Base Address: ", entry->base_address);
memory_length(fw, entry->header.type, entry->length, 8, passed);
fwts_log_info_verbatim(fw, " Doorbell Register:");
- fwts_log_info_verbatim(fw, " Address Space ID 0x%2.2" PRIx8, gas->address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, gas->register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, gas->register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, gas->access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, gas->address);
- fwts_log_info_verbatim(fw, " Doorbell Preserve: 0x%16.16" PRIx64, entry->doorbell_preserve);
- fwts_log_info_verbatim(fw, " Doorbell Write: 0x%16.16" PRIx64, entry->doorbell_write);
- fwts_log_info_verbatim(fw, " Nominal Latency: 0x%8.8" PRIx32, entry->nominal_latency);
- fwts_log_info_verbatim(fw, " Max Periodic Access Rate: 0x%8.8" PRIx32, entry->max_periodic_access_rate);
- fwts_log_info_verbatim(fw, " Min Request Turnaround Time: 0x%8.8" PRIx32, entry->min_request_turnaround_time);
+ fwts_log_info_simp_int(fw, " Address Space ID ", gas->address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", gas->register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", gas->register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", gas->access_width);
+ fwts_log_info_simp_int(fw, " Address ", gas->address);
+ fwts_log_info_simp_int(fw, " Doorbell Preserve: ", entry->doorbell_preserve);
+ fwts_log_info_simp_int(fw, " Doorbell Write: ", entry->doorbell_write);
+ fwts_log_info_simp_int(fw, " Nominal Latency: ", entry->nominal_latency);
+ fwts_log_info_simp_int(fw, " Max Periodic Access Rate: ", entry->max_periodic_access_rate);
+ fwts_log_info_simp_int(fw, " Min Request Turnaround Time: ", entry->min_request_turnaround_time);
fwts_acpi_space_id_check(fw, "PCCT", "Subspace Type 0", passed, gas->address_space_id, 2,
FWTS_GAS_ADDR_SPACE_ID_SYSTEM_MEMORY, FWTS_GAS_ADDR_SPACE_ID_SYSTEM_IO);
@@ -112,73 +112,73 @@ static void generic_comm_test(fwts_framework *fw, fwts_acpi_table_pcct_subspace_
static void hw_reduced_comm_test_type1(fwts_framework *fw, fwts_acpi_table_pcct_subspace_type_1 *entry, bool *passed)
{
- fwts_log_info_verbatim(fw, " Platform Interrupt: 0x%8.8" PRIx32, entry->platform_interrupt);
- fwts_log_info_verbatim(fw, " Platform Interrupt Flags: 0x%2.2" PRIx8, entry->platform_interrupt_flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, entry->reserved);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, entry->base_address);
+ fwts_log_info_simp_int(fw, " Platform Interrupt: ", entry->platform_interrupt);
+ fwts_log_info_simp_int(fw, " Platform Interrupt Flags: ", entry->platform_interrupt_flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Base Address: ", entry->base_address);
memory_length(fw, entry->header.type, entry->length, 8, passed);
fwts_log_info_verbatim(fw, " Doorbell Register:");
gas_messages(fw, entry->header.type, &entry->doorbell_register, passed);
- fwts_log_info_verbatim(fw, " Doorbell Preserve: 0x%16.16" PRIx64, entry->doorbell_preserve);
- fwts_log_info_verbatim(fw, " Doorbell Write: 0x%16.16" PRIx64, entry->doorbell_write);
- fwts_log_info_verbatim(fw, " Nominal Latency: 0x%8.8" PRIx32, entry->nominal_latency);
- fwts_log_info_verbatim(fw, " Max Periodic Access Rate: 0x%8.8" PRIx32, entry->max_periodic_access_rate);
- fwts_log_info_verbatim(fw, " Min Request Turnaround Time: 0x%8.8" PRIx32, entry->min_request_turnaround_time);
+ fwts_log_info_simp_int(fw, " Doorbell Preserve: ", entry->doorbell_preserve);
+ fwts_log_info_simp_int(fw, " Doorbell Write: ", entry->doorbell_write);
+ fwts_log_info_simp_int(fw, " Nominal Latency: ", entry->nominal_latency);
+ fwts_log_info_simp_int(fw, " Max Periodic Access Rate: ", entry->max_periodic_access_rate);
+ fwts_log_info_simp_int(fw, " Min Request Turnaround Time: ", entry->min_request_turnaround_time);
fwts_acpi_reserved_bits_check(fw, "PCCT", "Platform Interrupt Flags", entry->platform_interrupt_flags, sizeof(uint8_t), 2, 7, passed);
}
static void hw_reduced_comm_test_type2(fwts_framework *fw, fwts_acpi_table_pcct_subspace_type_2 *entry, bool *passed)
{
- fwts_log_info_verbatim(fw, " Platform Interrupt: 0x%8.8" PRIx32, entry->platform_interrupt);
- fwts_log_info_verbatim(fw, " Platform Interrupt Flags: 0x%2.2" PRIx8, entry->platform_interrupt_flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, entry->reserved);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, entry->base_address);
+ fwts_log_info_simp_int(fw, " Platform Interrupt: ", entry->platform_interrupt);
+ fwts_log_info_simp_int(fw, " Platform Interrupt Flags: ", entry->platform_interrupt_flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Base Address: ", entry->base_address);
memory_length(fw, entry->header.type, entry->length, 8, passed);
fwts_log_info_verbatim(fw, " Doorbell Register:");
gas_messages(fw, entry->header.type, &entry->doorbell_register, passed);
- fwts_log_info_verbatim(fw, " Doorbell Preserve: 0x%16.16" PRIx64, entry->doorbell_preserve);
- fwts_log_info_verbatim(fw, " Doorbell Write: 0x%16.16" PRIx64, entry->doorbell_write);
- fwts_log_info_verbatim(fw, " Nominal Latency: 0x%8.8" PRIx32, entry->nominal_latency);
- fwts_log_info_verbatim(fw, " Max Periodic Access Rate: 0x%8.8" PRIx32, entry->max_periodic_access_rate);
- fwts_log_info_verbatim(fw, " Min Request Turnaround Time: 0x%8.8" PRIx32, entry->min_request_turnaround_time);
+ fwts_log_info_simp_int(fw, " Doorbell Preserve: ", entry->doorbell_preserve);
+ fwts_log_info_simp_int(fw, " Doorbell Write: ", entry->doorbell_write);
+ fwts_log_info_simp_int(fw, " Nominal Latency: ", entry->nominal_latency);
+ fwts_log_info_simp_int(fw, " Max Periodic Access Rate: ", entry->max_periodic_access_rate);
+ fwts_log_info_simp_int(fw, " Min Request Turnaround Time: ", entry->min_request_turnaround_time);
fwts_log_info_verbatim(fw, " Platform Interrupt Ack Register:");
gas_messages(fw, entry->header.type, &entry->platform_ack_register, passed);
- fwts_log_info_verbatim(fw, " Platform Ack Preserve: 0x%16.16" PRIx64, entry->platform_ack_preserve);
- fwts_log_info_verbatim(fw, " Platform Ack Write: 0x%16.16" PRIx64, entry->platform_ack_write);
+ fwts_log_info_simp_int(fw, " Platform Ack Preserve: ", entry->platform_ack_preserve);
+ fwts_log_info_simp_int(fw, " Platform Ack Write: ", entry->platform_ack_write);
fwts_acpi_reserved_bits_check(fw, "PCCT", "Platform Interrupt Flags", entry->platform_interrupt_flags, sizeof(uint8_t), 2, 7, passed);
}
static void extended_pcc_test(fwts_framework *fw, fwts_acpi_table_pcct_subspace_type_3_4 *entry, bool *passed)
{
- fwts_log_info_verbatim(fw, " Platform Interrupt: 0x%8.8" PRIx32, entry->platform_interrupt);
- fwts_log_info_verbatim(fw, " Platform Interrupt Flags: 0x%2.2" PRIx8, entry->platform_interrupt_flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, entry->reserved1);
- fwts_log_info_verbatim(fw, " Base Address: 0x%16.16" PRIx64, entry->base_address);
+ fwts_log_info_simp_int(fw, " Platform Interrupt: ", entry->platform_interrupt);
+ fwts_log_info_simp_int(fw, " Platform Interrupt Flags: ", entry->platform_interrupt_flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved1);
+ fwts_log_info_simp_int(fw, " Base Address: ", entry->base_address);
memory_length(fw, entry->header.type, entry->length, 16, passed);
fwts_log_info_verbatim(fw, " Doorbell Register:");
gas_messages(fw, entry->header.type, &entry->doorbell_register, passed);
- fwts_log_info_verbatim(fw, " Doorbell Preserve: 0x%16.16" PRIx64, entry->doorbell_preserve);
- fwts_log_info_verbatim(fw, " Doorbell Write: 0x%16.16" PRIx64, entry->doorbell_write);
- fwts_log_info_verbatim(fw, " Nominal Latency: 0x%8.8" PRIx32, entry->nominal_latency);
- fwts_log_info_verbatim(fw, " Max Periodic Access Rate: 0x%8.8" PRIx32, entry->max_periodic_access_rate);
- fwts_log_info_verbatim(fw, " Min Request Turnaround Time: 0x%8.8" PRIx32, entry->min_request_turnaround_time);
+ fwts_log_info_simp_int(fw, " Doorbell Preserve: ", entry->doorbell_preserve);
+ fwts_log_info_simp_int(fw, " Doorbell Write: ", entry->doorbell_write);
+ fwts_log_info_simp_int(fw, " Nominal Latency: ", entry->nominal_latency);
+ fwts_log_info_simp_int(fw, " Max Periodic Access Rate: ", entry->max_periodic_access_rate);
+ fwts_log_info_simp_int(fw, " Min Request Turnaround Time: ", entry->min_request_turnaround_time);
fwts_log_info_verbatim(fw, " Command Complete Check Register:");
gas_messages(fw, entry->header.type, &entry->platform_ack_register, passed);
- fwts_log_info_verbatim(fw, " Doorbell Ack Preserve: 0x%16.16" PRIx64, entry->platform_ack_preserve);
- fwts_log_info_verbatim(fw, " Doorbell Ack Write: 0x%16.16" PRIx64, entry->platform_ack_write);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, entry->reserved2);
+ fwts_log_info_simp_int(fw, " Doorbell Ack Preserve: ", entry->platform_ack_preserve);
+ fwts_log_info_simp_int(fw, " Doorbell Ack Write: ", entry->platform_ack_write);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved2);
fwts_log_info_verbatim(fw, " Cmd Complete Check Register:");
gas_messages(fw, entry->header.type, &entry->cmd_complete_register, passed);
- fwts_log_info_verbatim(fw, " Cmd Complete Check Mask: 0x%16.16" PRIx64, entry->cmd_complete_mask);
+ fwts_log_info_simp_int(fw, " Cmd Complete Check Mask: ", entry->cmd_complete_mask);
fwts_log_info_verbatim(fw, " Cmd Complete Update Register:");
gas_messages(fw, entry->header.type, &entry->cmd_update_register, passed);
- fwts_log_info_verbatim(fw, " Cmd Complete Update Mask: 0x%16.16" PRIx64, entry->cmd_update_preserve_mask);
- fwts_log_info_verbatim(fw, " Cmd Complete Set Mask: 0x%16.16" PRIx64, entry->cmd_update_preserve_mask);
+ fwts_log_info_simp_int(fw, " Cmd Complete Update Mask: ", entry->cmd_update_preserve_mask);
+ fwts_log_info_simp_int(fw, " Cmd Complete Set Mask: ", entry->cmd_update_preserve_mask);
fwts_log_info_verbatim(fw, " Error Status Register:");
gas_messages(fw, entry->header.type, &entry->error_status_register, passed);
- fwts_log_info_verbatim(fw, " Error Status Mask: 0x%16.16" PRIx64, entry->error_status_mask);
+ fwts_log_info_simp_int(fw, " Error Status Mask: ", entry->error_status_mask);
fwts_acpi_reserved_bits_check(fw, "PCCT", "Platform Interrupt Flags", entry->platform_interrupt_flags, sizeof(uint8_t), 2, 7, passed);
}
@@ -191,8 +191,8 @@ static int pcct_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "PCC Table:");
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, pcct->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, pcct->reserved);
+ fwts_log_info_simp_int(fw, " Flags: ", pcct->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", pcct->reserved);
fwts_log_nl(fw);
fwts_acpi_reserved_bits_check(fw, "PCCT", "Flags", pcct->flags, sizeof(pcct->flags), 1, 31, &passed);
@@ -204,8 +204,8 @@ static int pcct_test1(fwts_framework *fw)
while (offset < table->length) {
fwts_log_info_verbatim(fw, " PCC Subspace Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, pcct_sub->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, pcct_sub->length);
+ fwts_log_info_simp_int(fw, " Type: ", pcct_sub->type);
+ fwts_log_info_simp_int(fw, " Length: ", pcct_sub->length);
if (pcct_sub->type == 0) {
fwts_acpi_table_pcct_subspace_type_0 *subspace = (fwts_acpi_table_pcct_subspace_type_0 *) pcct_sub;
diff --git a/src/acpi/pdtt/pdtt.c b/src/acpi/pdtt/pdtt.c
index f1a5e811..1feb0af0 100644
--- a/src/acpi/pdtt/pdtt.c
+++ b/src/acpi/pdtt/pdtt.c
@@ -38,9 +38,9 @@ static int pdtt_test1(fwts_framework *fw)
((uint32_t) pdtt->reserved[2] << 16);
fwts_log_info_verbatim(fw, "PDTT Platform Debug Trigger Table:");
- fwts_log_info_verbatim(fw, " Trigger Count: 0x%2.2" PRIx8, pdtt->trigger_count);
+ fwts_log_info_simp_int(fw, " Trigger Count: ", pdtt->trigger_count);
fwts_log_info_verbatim(fw, " Reserved[3]: 0x%6.6" PRIx32, reserved);
- fwts_log_info_verbatim(fw, " Trigger ID Array Offset: 0x%2.2" PRIx8, pdtt->array_offset);
+ fwts_log_info_simp_int(fw, " Trigger ID Array Offset: ", pdtt->array_offset);
fwts_acpi_reserved_zero_check(fw, "PDTT", "Reserved", reserved, sizeof(reserved), &passed);
@@ -60,8 +60,8 @@ static int pdtt_test1(fwts_framework *fw)
fwts_log_info_verbatim(fw, " Platform Communication Channel IDs");
for (i = 0; i < pdtt->trigger_count; i++) {
- fwts_log_info_verbatim(fw, " Sub channel ID: 0x%2.2" PRIx8, entry->sub_channel_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, entry->flags);
+ fwts_log_info_simp_int(fw, " Sub channel ID: ", entry->sub_channel_id);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
fwts_acpi_reserved_bits_check(fw, "PDTT", "Flags", entry->flags, sizeof(entry->flags), 3, 7, &passed);
if ((offset += sizeof(fwts_acpi_table_pdtt_channel)) > table->length) {
diff --git a/src/acpi/pmtt/pmtt.c b/src/acpi/pmtt/pmtt.c
index f7a7dac2..99fd510d 100644
--- a/src/acpi/pmtt/pmtt.c
+++ b/src/acpi/pmtt/pmtt.c
@@ -29,11 +29,11 @@ acpi_table_init(PMTT, &table)
static void pmtt_subtable_header_test(fwts_framework *fw, fwts_acpi_table_pmtt_header *entry, bool *passed)
{
fwts_log_info_verbatim(fw, " PMTT Subtable:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, entry->reserved1);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, entry->length);
- fwts_log_info_verbatim(fw, " Flags: 0x%4.4" PRIx16, entry->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved2);
+ fwts_log_info_simp_int(fw, " Type: ", entry->type);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved1);
+ fwts_log_info_simp_int(fw, " Length: ", entry->length);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved2);
fwts_acpi_reserved_zero_check(fw, "PMTT", "Reserved1", entry->reserved1, sizeof(entry->reserved1), passed);
fwts_acpi_reserved_bits_check(fw, "PMTT", "Flags", entry->flags, sizeof(entry->flags), 4, 15, passed);
@@ -51,10 +51,10 @@ static void pmtt_subtable_header_test(fwts_framework *fw, fwts_acpi_table_pmtt_h
static void pmtt_physical_component_test(fwts_framework *fw, fwts_acpi_table_pmtt_physical_component *entry, bool *passed)
{
pmtt_subtable_header_test(fw, &entry->header, passed);
- fwts_log_info_verbatim(fw, " Physical Component Identifier: 0x%4.4" PRIx16, entry->component_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
- fwts_log_info_verbatim(fw, " Size of DIMM: 0x%8.8" PRIx32, entry->memory_size);
- fwts_log_info_verbatim(fw, " SMBIOS Handle: 0x%8.8" PRIx32, entry->bios_handle);
+ fwts_log_info_simp_int(fw, " Physical Component Identifier: ", entry->component_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Size of DIMM: ", entry->memory_size);
+ fwts_log_info_simp_int(fw, " SMBIOS Handle: ", entry->bios_handle);
fwts_acpi_reserved_zero_check(fw, "PMTT", "Reserved", entry->reserved, sizeof(entry->reserved), passed);
@@ -74,14 +74,14 @@ static void pmtt_controller_test(fwts_framework *fw, fwts_acpi_table_pmtt_contro
size_t i;
pmtt_subtable_header_test(fw, &entry->header, passed);
- fwts_log_info_verbatim(fw, " Read Latency: 0x%8.8" PRIx32, entry->read_latency);
- fwts_log_info_verbatim(fw, " Write latency: 0x%8.8" PRIx32, entry->write_latency);
- fwts_log_info_verbatim(fw, " Read Bandwidth: 0x%8.8" PRIx32, entry->read_bandwidth);
- fwts_log_info_verbatim(fw, " Write Bandwidth: 0x%8.8" PRIx32, entry->write_bandwidth);
- fwts_log_info_verbatim(fw, " Optimal Access Unit: 0x%4.4" PRIx16, entry->access_width);
- fwts_log_info_verbatim(fw, " Optimal Access Alignment: 0x%4.4" PRIx16, entry->alignment);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
- fwts_log_info_verbatim(fw, " Number of Proximity Domains: 0x%4.4" PRIx16, entry->domain_count);
+ fwts_log_info_simp_int(fw, " Read Latency: ", entry->read_latency);
+ fwts_log_info_simp_int(fw, " Write latency: ", entry->write_latency);
+ fwts_log_info_simp_int(fw, " Read Bandwidth: ", entry->read_bandwidth);
+ fwts_log_info_simp_int(fw, " Write Bandwidth: ", entry->write_bandwidth);
+ fwts_log_info_simp_int(fw, " Optimal Access Unit: ", entry->access_width);
+ fwts_log_info_simp_int(fw, " Optimal Access Alignment: ", entry->alignment);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Number of Proximity Domains: ", entry->domain_count);
fwts_acpi_reserved_zero_check(fw, "PMTT", "Reserved", entry->reserved, sizeof(entry->reserved), passed);
@@ -96,7 +96,7 @@ static void pmtt_controller_test(fwts_framework *fw, fwts_acpi_table_pmtt_contro
fwts_acpi_table_pmtt_domain *domain = (fwts_acpi_table_pmtt_domain *)(((char *) entry) + offset);
for (i = 0; i < entry->domain_count; i++) {
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, domain->proximity_domain);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", domain->proximity_domain);
domain++;
/* TODO cross check proximity domain with SRAT table*/
}
@@ -125,8 +125,8 @@ static void pmtt_socket_test(fwts_framework *fw, fwts_acpi_table_pmtt_socket *en
uint32_t offset;
pmtt_subtable_header_test(fw, &entry->header, passed);
- fwts_log_info_verbatim(fw, " Socket Identifier: 0x%4.4" PRIx16, entry->socket_id);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
+ fwts_log_info_simp_int(fw, " Socket Identifier: ", entry->socket_id);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
fwts_acpi_reserved_zero_check(fw, "PMTT", "Reserved", entry->reserved, sizeof(entry->reserved), passed);
@@ -156,7 +156,7 @@ static int pmtt_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "PMTT Table:");
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, pmtt->reserved);
+ fwts_log_info_simp_int(fw, " Reserved: ", pmtt->reserved);
fwts_acpi_reserved_zero_check(fw, "PMTT", "Reserved", pmtt->reserved, sizeof(pmtt->reserved), &passed);
diff --git a/src/acpi/pptt/pptt.c b/src/acpi/pptt/pptt.c
index 7f5eff48..7b5adb27 100644
--- a/src/acpi/pptt/pptt.c
+++ b/src/acpi/pptt/pptt.c
@@ -29,13 +29,13 @@ acpi_table_init(PPTT, &table)
static void pptt_processor_test(fwts_framework *fw, const fwts_acpi_table_pptt_processor *entry, uint8_t rev, bool *passed)
{
fwts_log_info_verbatim(fw, " Processor hierarchy node structure (Type 0):");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->header.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, entry->header.length);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, entry->flags);
- fwts_log_info_verbatim(fw, " Parent: 0x%8.8" PRIx32, entry->parent);
- fwts_log_info_verbatim(fw, " ACPI Processor ID: 0x%8.8" PRIx32, entry->acpi_processor_id);
- fwts_log_info_verbatim(fw, " Number of Private Resources: 0x%8.8" PRIx32, entry->number_priv_resources);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Parent: ", entry->parent);
+ fwts_log_info_simp_int(fw, " ACPI Processor ID: ", entry->acpi_processor_id);
+ fwts_log_info_simp_int(fw, " Number of Private Resources: ", entry->number_priv_resources);
if ((entry->header.length - sizeof(fwts_acpi_table_pptt_processor)) / 4 == entry->number_priv_resources) {
uint32_t i;
@@ -64,16 +64,16 @@ static void pptt_cache_test(fwts_framework *fw, const fwts_acpi_table_pptt_cache
{
fwts_log_info_verbatim(fw, " Cache Type Structure (Type 1):");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->header.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, entry->header.length);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, entry->flags);
- fwts_log_info_verbatim(fw, " Next Level of Cache: 0x%8.8" PRIx32, entry->next_level_cache);
- fwts_log_info_verbatim(fw, " Size: 0x%8.8" PRIx32, entry->size);
- fwts_log_info_verbatim(fw, " Number of sets: 0x%8.8" PRIx32, entry->number_sets);
- fwts_log_info_verbatim(fw, " Associativity: 0x%2.2" PRIx8, entry->associativity);
- fwts_log_info_verbatim(fw, " Attributes: 0x%2.2" PRIx8, entry->attributes);
- fwts_log_info_verbatim(fw, " Line size: 0x%4.4" PRIx16, entry->line_size);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->flags);
+ fwts_log_info_simp_int(fw, " Next Level of Cache: ", entry->next_level_cache);
+ fwts_log_info_simp_int(fw, " Size: ", entry->size);
+ fwts_log_info_simp_int(fw, " Number of sets: ", entry->number_sets);
+ fwts_log_info_simp_int(fw, " Associativity: ", entry->associativity);
+ fwts_log_info_simp_int(fw, " Attributes: ", entry->attributes);
+ fwts_log_info_simp_int(fw, " Line size: ", entry->line_size);
fwts_acpi_reserved_zero_check(fw, "PPTT", "Reserved", entry->reserved, sizeof(entry->reserved), passed);
fwts_acpi_reserved_bits_check(fw, "PPTT", "Flags", entry->flags, sizeof(entry->flags), 7, 31, passed);
@@ -88,15 +88,15 @@ static void pptt_id_test(fwts_framework *fw, const fwts_acpi_table_pptt_id *entr
vendor_id[4] = 0;
fwts_log_info_verbatim(fw, " ID structure (Type 2):");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->header.type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, entry->header.length);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, entry->reserved);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Reserved: ", entry->reserved);
fwts_log_info_verbatim(fw, " VENDOR_ID: %4.4s", vendor_id);
- fwts_log_info_verbatim(fw, " LEVEL_1_ID: 0x%16.16" PRIx64, entry->level1_id);
- fwts_log_info_verbatim(fw, " LEVEL_2_ID: 0x%16.16" PRIx64, entry->level2_id);
- fwts_log_info_verbatim(fw, " MAJOR_REV: 0x%4.4" PRIx16, entry->major_rev);
- fwts_log_info_verbatim(fw, " MINOR_REV: 0x%4.4" PRIx16, entry->minor_rev);
- fwts_log_info_verbatim(fw, " SPIN_REV: 0x%4.4" PRIx16, entry->spin_rev);
+ fwts_log_info_simp_int(fw, " LEVEL_1_ID: ", entry->level1_id);
+ fwts_log_info_simp_int(fw, " LEVEL_2_ID: ", entry->level2_id);
+ fwts_log_info_simp_int(fw, " MAJOR_REV: ", entry->major_rev);
+ fwts_log_info_simp_int(fw, " MINOR_REV: ", entry->minor_rev);
+ fwts_log_info_simp_int(fw, " SPIN_REV: ", entry->spin_rev);
fwts_acpi_reserved_zero_check(fw, "PPTT", "Reserved", entry->reserved, sizeof(entry->reserved), passed);
}
diff --git a/src/acpi/sdev/sdev.c b/src/acpi/sdev/sdev.c
index d25110b0..1f8e14ea 100644
--- a/src/acpi/sdev/sdev.c
+++ b/src/acpi/sdev/sdev.c
@@ -32,13 +32,13 @@ acpi_table_init(SDEV, &table)
static void sdev_acpi_namespace_device_test(fwts_framework *fw, const fwts_acpi_table_sdev_acpi *entry, bool *passed)
{
fwts_log_info_verbatim(fw, " ACPI Integrated Device (Type 0):");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->header.type);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, entry->header.flags);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, entry->header.length);
- fwts_log_info_verbatim(fw, " Device Id Offset: 0x%4.4" PRIx16, entry->device_id_offset);
- fwts_log_info_verbatim(fw, " Device Id Length: 0x%4.4" PRIx16, entry->device_id_length);
- fwts_log_info_verbatim(fw, " Vendor Specific Data Offset: 0x%4.4" PRIx16, entry->vendor_offset);
- fwts_log_info_verbatim(fw, " Vendor Specific Data Length: 0x%4.4" PRIx16, entry->vendor_length);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->header.flags);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " Device Id Offset: ", entry->device_id_offset);
+ fwts_log_info_simp_int(fw, " Device Id Length: ", entry->device_id_length);
+ fwts_log_info_simp_int(fw, " Vendor Specific Data Offset: ", entry->vendor_offset);
+ fwts_log_info_simp_int(fw, " Vendor Specific Data Length: ", entry->vendor_length);
fwts_acpi_reserved_bits_check(fw, "SDEV", "Flags", entry->header.flags, sizeof(entry->header.flags), 1, 15, passed);
}
@@ -46,15 +46,15 @@ static void sdev_acpi_namespace_device_test(fwts_framework *fw, const fwts_acpi_
static void sdev_pcie_endpoint_device_test(fwts_framework *fw, const fwts_acpi_table_sdev_pcie *entry, bool *passed)
{
fwts_log_info_verbatim(fw, " PCIe Endpoint Device (Type 1):");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, entry->header.type);
- fwts_log_info_verbatim(fw, " Flags: 0x%2.2" PRIx8, entry->header.flags);
- fwts_log_info_verbatim(fw, " Length: 0x%4.4" PRIx16, entry->header.length);
- fwts_log_info_verbatim(fw, " PCI Segment Number: 0x%4.4" PRIx16, entry->segment);
- fwts_log_info_verbatim(fw, " Start Bus Number: 0x%4.4" PRIx16, entry->start_bus);
- fwts_log_info_verbatim(fw, " PCI Path Offset: 0x%4.4" PRIx16, entry->path_offset);
- fwts_log_info_verbatim(fw, " PCI Path Length: 0x%4.4" PRIx16, entry->path_length);
- fwts_log_info_verbatim(fw, " Vendor Specific Data Offset: 0x%4.4" PRIx16, entry->vendor_offset);
- fwts_log_info_verbatim(fw, " Vendor Specific Data Length: 0x%4.4" PRIx16, entry->vendor_length);
+ fwts_log_info_simp_int(fw, " Type: ", entry->header.type);
+ fwts_log_info_simp_int(fw, " Flags: ", entry->header.flags);
+ fwts_log_info_simp_int(fw, " Length: ", entry->header.length);
+ fwts_log_info_simp_int(fw, " PCI Segment Number: ", entry->segment);
+ fwts_log_info_simp_int(fw, " Start Bus Number: ", entry->start_bus);
+ fwts_log_info_simp_int(fw, " PCI Path Offset: ", entry->path_offset);
+ fwts_log_info_simp_int(fw, " PCI Path Length: ", entry->path_length);
+ fwts_log_info_simp_int(fw, " Vendor Specific Data Offset: ", entry->vendor_offset);
+ fwts_log_info_simp_int(fw, " Vendor Specific Data Length: ", entry->vendor_length);
fwts_acpi_reserved_bits_check(fw, "SDEV", "Flags", entry->header.flags, sizeof(entry->header.flags), 1, 15, passed);
}
diff --git a/src/acpi/slic/slic.c b/src/acpi/slic/slic.c
index c80ca729..abbf984a 100644
--- a/src/acpi/slic/slic.c
+++ b/src/acpi/slic/slic.c
@@ -58,8 +58,8 @@ static int slic_test1(fwts_framework *fw)
if (hdr->length < sizeof(fwts_acpi_table_slic_header))
break;
#if DUMP_SLIC
- fwts_log_info_verbatim(fw, " Type: 0x%8.8" PRIx32, hdr->type);
- fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32, hdr->length);
+ fwts_log_info_simp_int(fw, " Type: ", hdr->type);
+ fwts_log_info_simp_int(fw, " Length: ", hdr->length);
#endif
switch (hdr->type) {
@@ -79,14 +79,14 @@ static int slic_test1(fwts_framework *fw)
#if DUMP_SLIC
fwts_log_info_verbatim(fw, " SLIC Public Key:\n");
- fwts_log_info_verbatim(fw, " Key Type: 0x%2.2" PRIx8, key->key_type);
- fwts_log_info_verbatim(fw, " Version: 0x%2.2" PRIx8, key->version);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, key->reserved);
- fwts_log_info_verbatim(fw, " Algorithm: 0x%8.8" PRIx32, key->algorithm);
+ fwts_log_info_simp_int(fw, " Key Type: ", key->key_type);
+ fwts_log_info_simp_int(fw, " Version: ", key->version);
+ fwts_log_info_simp_int(fw, " Reserved: ", key->reserved);
+ fwts_log_info_simp_int(fw, " Algorithm: ", key->algorithm);
fwts_log_info_verbatim(fw, " Magic: '%c%c%c%c'",
key->magic[0], key->magic[1], key->magic[2], key->magic[3]);
- fwts_log_info_verbatim(fw, " Bit Length: 0x%8.8" PRIx32, key->bit_length);
- fwts_log_info_verbatim(fw, " Exponent: 0x%8.8" PRIx32, key->exponent);
+ fwts_log_info_simp_int(fw, " Bit Length: ", key->bit_length);
+ fwts_log_info_simp_int(fw, " Exponent: ", key->exponent);
/* For the moment, don't dump the modulus */
#endif
}
@@ -108,11 +108,11 @@ static int slic_test1(fwts_framework *fw)
fwts_log_info(fw, "SLIC Windows Marker Structure has had minimal check due to proprietary nature of the table");
#if DUMP_SLIC
fwts_log_info_verbatim(fw, " SLIC Windows Marker:\n");
- fwts_log_info_verbatim(fw, " Version: 0x%2.2" PRIx8, marker->version);
+ fwts_log_info_simp_int(fw, " Version: ", marker->version);
fwts_log_info_verbatim(fw, " OEM ID: '%6.6s'", marker->oem_id);
fwts_log_info_verbatim(fw, " OEM Table ID: '%8.8s'", marker->oem_table_id);
fwts_log_info_verbatim(fw, " Windows Flag: '%8.8s'", marker->windows_flag);
- fwts_log_info_verbatim(fw, " SLIC Version: 0x%4.4" PRIx32, marker->slic_version);
+ fwts_log_info_simp_int(fw, " SLIC Version: ", marker->slic_version);
fwts_log_info_verbatim(fw, " Reserved: "
"0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8 " 0x%2.2" PRIx8,
marker->reserved[0], marker->reserved[1], marker->reserved[2], marker->reserved[3]);
diff --git a/src/acpi/slit/slit.c b/src/acpi/slit/slit.c
index e400601d..7028eaf3 100644
--- a/src/acpi/slit/slit.c
+++ b/src/acpi/slit/slit.c
@@ -50,7 +50,7 @@ static int slit_test1(fwts_framework *fw)
n = slit->num_of_system_localities;
fwts_log_info_verbatim(fw, "SLIT System Locality Distance Information Table:");
- fwts_log_info_verbatim(fw, " Number of Localities: 0x%" PRIx64, n);
+ fwts_log_info_simp_int(fw, " Number of Localities: ", n);
/*
* ACPI table length is 32 bits, so maximum matrix of entries size is
diff --git a/src/acpi/spmi/spmi.c b/src/acpi/spmi/spmi.c
index 8971ad21..d1cba2c1 100644
--- a/src/acpi/spmi/spmi.c
+++ b/src/acpi/spmi/spmi.c
@@ -67,24 +67,24 @@ static int spmi_test1(fwts_framework *fw)
fwts_log_info_verbatim(fw, "SPMI Service Processor Management Interface Description Table:");
fwts_log_info_verbatim(fw, " Interface Type: 0x%2.2" PRIx8 " (%s)",
spmi->interface_type, interface_type);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, spmi->reserved1);
- fwts_log_info_verbatim(fw, " Specification Revision: 0x%2.2" PRIx8, spmi->specification_revision);
- fwts_log_info_verbatim(fw, " Interrupt Type: 0x%2.2" PRIx8, spmi->interrupt_type);
- fwts_log_info_verbatim(fw, " GPE: 0x%2.2" PRIx8, spmi->gpe);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, spmi->reserved2);
- fwts_log_info_verbatim(fw, " PCI Device Flag: 0x%2.2" PRIx8, spmi->pci_device_flag);
- fwts_log_info_verbatim(fw, " Global System Interrupt 0x%8.8" PRIx32, spmi->global_system_interrupt);
+ fwts_log_info_simp_int(fw, " Reserved: ", spmi->reserved1);
+ fwts_log_info_simp_int(fw, " Specification Revision: ", spmi->specification_revision);
+ fwts_log_info_simp_int(fw, " Interrupt Type: ", spmi->interrupt_type);
+ fwts_log_info_simp_int(fw, " GPE: ", spmi->gpe);
+ fwts_log_info_simp_int(fw, " Reserved: ", spmi->reserved2);
+ fwts_log_info_simp_int(fw, " PCI Device Flag: ", spmi->pci_device_flag);
+ fwts_log_info_simp_int(fw, " Global System Interrupt ", spmi->global_system_interrupt);
fwts_log_info_verbatim(fw, " Base Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, spmi->base_address.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, spmi->base_address.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, spmi->base_address.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, spmi->base_address.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, spmi->base_address.address);
- fwts_log_info_verbatim(fw, " PCI Segment Group: 0x%2.2" PRIx8, spmi->pci_segment_group_number);
- fwts_log_info_verbatim(fw, " PCI Bus: 0x%2.2" PRIx8, spmi->pci_bus_number);
- fwts_log_info_verbatim(fw, " PCI Device: 0x%2.2" PRIx8, spmi->pci_device_number);
- fwts_log_info_verbatim(fw, " PCI Function: 0x%2.2" PRIx8, spmi->pci_function_number);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, spmi->reserved3);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", spmi->base_address.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", spmi->base_address.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", spmi->base_address.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", spmi->base_address.access_width);
+ fwts_log_info_simp_int(fw, " Address ", spmi->base_address.address);
+ fwts_log_info_simp_int(fw, " PCI Segment Group: ", spmi->pci_segment_group_number);
+ fwts_log_info_simp_int(fw, " PCI Bus: ", spmi->pci_bus_number);
+ fwts_log_info_simp_int(fw, " PCI Device: ", spmi->pci_device_number);
+ fwts_log_info_simp_int(fw, " PCI Function: ", spmi->pci_function_number);
+ fwts_log_info_simp_int(fw, " Reserved: ", spmi->reserved3);
fwts_log_nl(fw);
if (spmi->interface_type < 1 || spmi->interface_type > 4) {
diff --git a/src/acpi/srat/srat.c b/src/acpi/srat/srat.c
index 770746f0..3c0abdb7 100644
--- a/src/acpi/srat/srat.c
+++ b/src/acpi/srat/srat.c
@@ -55,16 +55,16 @@ static void srat_check_local_apic_sapic_affinity(
}
fwts_log_info_verbatim(fw, "SRAT Local APIC/SAPIC Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Proximity Domain: [7:0] 0x%2.2" PRIx8, affinity->proximity_domain_0);
- fwts_log_info_verbatim(fw, " APIC ID: 0x%2.2" PRIx8, affinity->apic_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, affinity->flags);
- fwts_log_info_verbatim(fw, " Local SAPIC EID: 0x%2.2" PRIx8, affinity->local_sapic_eid);
- fwts_log_info_verbatim(fw, " Proximity Domain: [8:15] 0x%2.2" PRIx8, affinity->proximity_domain_1);
- fwts_log_info_verbatim(fw, " Proximity Domain: [16:23] 0x%2.2" PRIx8, affinity->proximity_domain_2);
- fwts_log_info_verbatim(fw, " Proximity Domain: [23:31] 0x%2.2" PRIx8, affinity->proximity_domain_3);
- fwts_log_info_verbatim(fw, " Clock Domain 0x%8.8" PRIx32, affinity->clock_domain);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Proximity Domain: [7:0] ", affinity->proximity_domain_0);
+ fwts_log_info_simp_int(fw, " APIC ID: ", affinity->apic_id);
+ fwts_log_info_simp_int(fw, " Flags: ", affinity->flags);
+ fwts_log_info_simp_int(fw, " Local SAPIC EID: ", affinity->local_sapic_eid);
+ fwts_log_info_simp_int(fw, " Proximity Domain: [8:15] ", affinity->proximity_domain_1);
+ fwts_log_info_simp_int(fw, " Proximity Domain: [16:23] ", affinity->proximity_domain_2);
+ fwts_log_info_simp_int(fw, " Proximity Domain: [23:31] ", affinity->proximity_domain_3);
+ fwts_log_info_simp_int(fw, " Clock Domain ", affinity->clock_domain);
fwts_log_nl(fw);
fwts_acpi_reserved_bits_check(fw, "SRAT", "Local APIC/SPAIC Affinity Flags", affinity->flags, sizeof(affinity->flags), 1, 31, passed);
@@ -109,17 +109,17 @@ static void srat_check_memory_affinity(
}
fwts_log_info_verbatim(fw, "SRAT Memory Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, affinity->proximity_domain);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, affinity->reserved1);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", affinity->proximity_domain);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved1);
fwts_log_info_verbatim(fw, " Base Address: 0x%8.8" PRIx32 "%8.8" PRIx32,
affinity->base_addr_hi, affinity->base_addr_lo);
fwts_log_info_verbatim(fw, " Length: 0x%8.8" PRIx32 "%8.8" PRIx32,
affinity->length_hi, affinity->length_lo);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, affinity->reserved2);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, affinity->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%16.16" PRIx64, affinity->reserved3);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved2);
+ fwts_log_info_simp_int(fw, " Flags: ", affinity->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved3);
fwts_log_nl(fw);
fwts_acpi_reserved_bits_check(fw, "SRAT", "Memory Affinity Flags", affinity->flags, sizeof(affinity->flags), 3, 31, passed);
@@ -155,14 +155,14 @@ static void srat_check_local_x2apic_affinity(
}
fwts_log_info_verbatim(fw, "SRAT Local x2APIC Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, affinity->reserved1);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%4.4" PRIx16, affinity->proximity_domain);
- fwts_log_info_verbatim(fw, " X2APIC ID: 0x%8.8" PRIx32, affinity->x2apic_id);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, affinity->flags);
- fwts_log_info_verbatim(fw, " Clock Domain 0x%8.8" PRIx32, affinity->clock_domain);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, affinity->reserved2);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved1);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", affinity->proximity_domain);
+ fwts_log_info_simp_int(fw, " X2APIC ID: ", affinity->x2apic_id);
+ fwts_log_info_simp_int(fw, " Flags: ", affinity->flags);
+ fwts_log_info_simp_int(fw, " Clock Domain ", affinity->clock_domain);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved2);
fwts_log_nl(fw);
/* Spec states 1st reserved field MUST be zero */
@@ -213,12 +213,12 @@ static void srat_check_gicc_affinity(
}
fwts_log_info_verbatim(fw, "SRAT GICC Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, affinity->proximity_domain);
- fwts_log_info_verbatim(fw, " ACPI Processor UID: 0x%8.8" PRIx32, affinity->acpi_processor_uid);
- fwts_log_info_verbatim(fw, " Flags: 0x%8.8" PRIx32, affinity->flags);
- fwts_log_info_verbatim(fw, " Clock Domain 0x%8.8" PRIx32, affinity->clock_domain);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", affinity->proximity_domain);
+ fwts_log_info_simp_int(fw, " ACPI Processor UID: ", affinity->acpi_processor_uid);
+ fwts_log_info_simp_int(fw, " Flags: ", affinity->flags);
+ fwts_log_info_simp_int(fw, " Clock Domain ", affinity->clock_domain);
fwts_log_nl(fw);
fwts_acpi_reserved_bits_check(fw, "SRAT", "GICC Affinity Flags", affinity->flags, sizeof(affinity->flags), 1, 31, passed);
@@ -259,11 +259,11 @@ static void srat_check_its_affinity(
}
fwts_log_info_verbatim(fw, "SRAT ITS Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, affinity->proximity_domain);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, affinity->reserved);
- fwts_log_info_verbatim(fw, " ITS ID 0x%8.8" PRIx32, affinity->its_id);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", affinity->proximity_domain);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved);
+ fwts_log_info_simp_int(fw, " ITS ID ", affinity->its_id);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "SRAT", "ITS Affinity Reserved", affinity->reserved, sizeof(affinity->reserved), passed);
@@ -302,21 +302,21 @@ static void srat_check_initiator_affinity(
}
fwts_log_info_verbatim(fw, "SRAT Initiator Affinity Structure:");
- fwts_log_info_verbatim(fw, " Type: 0x%2.2" PRIx8, affinity->type);
- fwts_log_info_verbatim(fw, " Length: 0x%2.2" PRIx8, affinity->length);
- fwts_log_info_verbatim(fw, " Reserved: 0x%2.2" PRIx8, affinity->reserved1);
- fwts_log_info_verbatim(fw, " Device Handle Type: 0x%2.2" PRIx8, affinity->device_handle_type);
- fwts_log_info_verbatim(fw, " Proximity Domain: 0x%8.8" PRIx32, affinity->proximity_domain);
+ fwts_log_info_simp_int(fw, " Type: ", affinity->type);
+ fwts_log_info_simp_int(fw, " Length: ", affinity->length);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved1);
+ fwts_log_info_simp_int(fw, " Device Handle Type: ", affinity->device_handle_type);
+ fwts_log_info_simp_int(fw, " Proximity Domain: ", affinity->proximity_domain);
fwts_log_info_verbatim(fw, " Device Handle:");
if (affinity->device_handle_type == 0) {
- fwts_log_info_verbatim(fw, " ACPI _HID: 0x%16.16" PRIx64, (uint64_t)affinity->device_handle[0]);
- fwts_log_info_verbatim(fw, " ACPI _UID: 0x%8.8" PRIx32, (uint32_t)affinity->device_handle[8]);
+ fwts_log_info_simp_int(fw, " ACPI _HID: ", (uint64_t)affinity->device_handle[0]);
+ fwts_log_info_simp_int(fw, " ACPI _UID: ", (uint32_t)affinity->device_handle[8]);
} else if (affinity->device_handle_type == 1) {
- fwts_log_info_verbatim(fw, " PCI Segment: 0x%4.4" PRIx16, (uint16_t)affinity->device_handle[0]);
- fwts_log_info_verbatim(fw, " PCI BDF Number: 0x%4.4" PRIx16, (uint16_t)affinity->device_handle[2]);
+ fwts_log_info_simp_int(fw, " PCI Segment: ", (uint16_t)affinity->device_handle[0]);
+ fwts_log_info_simp_int(fw, " PCI BDF Number: ", (uint16_t)affinity->device_handle[2]);
}
- fwts_log_info_verbatim(fw, " Flags: 0x%4.4" PRIx16, affinity->flags);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, affinity->reserved2);
+ fwts_log_info_simp_int(fw, " Flags: ", affinity->flags);
+ fwts_log_info_simp_int(fw, " Reserved: ", affinity->reserved2);
fwts_log_nl(fw);
fwts_acpi_reserved_zero_check(fw, "SRAT", "Initiator Affinity Reserved", affinity->reserved1, sizeof(affinity->reserved1), passed);
diff --git a/src/acpi/stao/stao.c b/src/acpi/stao/stao.c
index 91a95ccc..c0c24865 100644
--- a/src/acpi/stao/stao.c
+++ b/src/acpi/stao/stao.c
@@ -85,7 +85,7 @@ static int stao_test1(fwts_framework *fw)
/* Now we have got some sane data, dump the STAO */
fwts_log_info_verbatim(fw, "STAO Status Override Table:");
- fwts_log_info_verbatim(fw, " UART: 0x%2.2" PRIx8, stao->uart);
+ fwts_log_info_simp_int(fw, " UART: ", stao->uart);
ptr = (const char *)stao->namelist;
end = (const char *)table->data + stao->header.length;
diff --git a/src/acpi/tcpa/tcpa.c b/src/acpi/tcpa/tcpa.c
index a5b0d512..adf3440e 100644
--- a/src/acpi/tcpa/tcpa.c
+++ b/src/acpi/tcpa/tcpa.c
@@ -34,9 +34,9 @@ static int tcpa_client_test(fwts_framework *fw, fwts_acpi_table_tcpa *tcpa)
fwts_acpi_revision_check("TCPA", tcpa->header.revision, 2, &passed);
fwts_log_info_verbatim(fw, "TCPA Table:");
- fwts_log_info_verbatim(fw, " Platform Class: 0x%4.4" PRIx16, tcpa->platform_class);
- fwts_log_info_verbatim(fw, " Log Area Minimum Length: 0x%8.8" PRIx32, tcpa->client.log_zone_length);
- fwts_log_info_verbatim(fw, " Log Area Start Address: 0x%16.16" PRIx64, tcpa->client.log_zone_addr);
+ fwts_log_info_simp_int(fw, " Platform Class: ", tcpa->platform_class);
+ fwts_log_info_simp_int(fw, " Log Area Minimum Length: ", tcpa->client.log_zone_length);
+ fwts_log_info_simp_int(fw, " Log Area Start Address: ", tcpa->client.log_zone_addr);
return passed;
}
@@ -52,33 +52,33 @@ static int tcpa_server_test(fwts_framework *fw, fwts_acpi_table_tcpa *tcpa)
reserved2 = tcpa->server.reserved2[0] + (tcpa->server.reserved2[1] << 4) + (tcpa->server.reserved2[2] << 8);
fwts_log_info_verbatim(fw, "TCPA Table:");
- fwts_log_info_verbatim(fw, " Platform Class: 0x%4.4" PRIx16, tcpa->platform_class);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx16, tcpa->server.reserved);
- fwts_log_info_verbatim(fw, " Log Area Minimum Length: 0x%16.16" PRIx64, tcpa->server.log_zone_length);
- fwts_log_info_verbatim(fw, " Log Area Start Address: 0x%16.16" PRIx64, tcpa->server.log_zone_addr);
- fwts_log_info_verbatim(fw, " Specification Revision: 0x%4.4" PRIx16, tcpa->server.spec_revision);
- fwts_log_info_verbatim(fw, " Device Flags: 0x%2.2" PRIx16, tcpa->server.device_flag);
- fwts_log_info_verbatim(fw, " Interrupt Flags: 0x%2.2" PRIx16, tcpa->server.interrupt_flag);
- fwts_log_info_verbatim(fw, " GPE: 0x%2.2" PRIx16, tcpa->server.gpe);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, reserved2);
- fwts_log_info_verbatim(fw, " Global System Interrupt: 0x%8.8" PRIx32, tcpa->server.global_sys_interrupt);
+ fwts_log_info_simp_int(fw, " Platform Class: ", tcpa->platform_class);
+ fwts_log_info_simp_int(fw, " Reserved: ", tcpa->server.reserved);
+ fwts_log_info_simp_int(fw, " Log Area Minimum Length: ", tcpa->server.log_zone_length);
+ fwts_log_info_simp_int(fw, " Log Area Start Address: ", tcpa->server.log_zone_addr);
+ fwts_log_info_simp_int(fw, " Specification Revision: ", tcpa->server.spec_revision);
+ fwts_log_info_simp_int(fw, " Device Flags: ", tcpa->server.device_flag);
+ fwts_log_info_simp_int(fw, " Interrupt Flags: ", tcpa->server.interrupt_flag);
+ fwts_log_info_simp_int(fw, " GPE: ", tcpa->server.gpe);
+ fwts_log_info_simp_int(fw, " Reserved: ", reserved2);
+ fwts_log_info_simp_int(fw, " Global System Interrupt: ", tcpa->server.global_sys_interrupt);
fwts_log_info_verbatim(fw, " Base Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, tcpa->server.base_addr.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, tcpa->server.base_addr.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, tcpa->server.base_addr.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, tcpa->server.base_addr.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, tcpa->server.base_addr.address);
- fwts_log_info_verbatim(fw, " Reserved: 0x%8.8" PRIx32, tcpa->server.reserved3);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", tcpa->server.base_addr.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", tcpa->server.base_addr.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", tcpa->server.base_addr.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", tcpa->server.base_addr.access_width);
+ fwts_log_info_simp_int(fw, " Address ", tcpa->server.base_addr.address);
+ fwts_log_info_simp_int(fw, " Reserved: ", tcpa->server.reserved3);
fwts_log_info_verbatim(fw, " Configuration Address:");
- fwts_log_info_verbatim(fw, " Address Space ID: 0x%2.2" PRIx8, tcpa->server.config_addr.address_space_id);
- fwts_log_info_verbatim(fw, " Register Bit Width 0x%2.2" PRIx8, tcpa->server.config_addr.register_bit_width);
- fwts_log_info_verbatim(fw, " Register Bit Offset 0x%2.2" PRIx8, tcpa->server.config_addr.register_bit_offset);
- fwts_log_info_verbatim(fw, " Access Size 0x%2.2" PRIx8, tcpa->server.config_addr.access_width);
- fwts_log_info_verbatim(fw, " Address 0x%16.16" PRIx64, tcpa->server.config_addr.address);
- fwts_log_info_verbatim(fw, " PCI Segment Group: 0x%2.2" PRIx8, tcpa->server.pci_seg_number);
- fwts_log_info_verbatim(fw, " PCI Bus: 0x%2.2" PRIx8, tcpa->server.pci_bus_number);
- fwts_log_info_verbatim(fw, " PCI Device: 0x%2.2" PRIx8, tcpa->server.pci_dev_number);
- fwts_log_info_verbatim(fw, " PCI Function: 0x%2.2" PRIx8, tcpa->server.pci_func_number);
+ fwts_log_info_simp_int(fw, " Address Space ID: ", tcpa->server.config_addr.address_space_id);
+ fwts_log_info_simp_int(fw, " Register Bit Width ", tcpa->server.config_addr.register_bit_width);
+ fwts_log_info_simp_int(fw, " Register Bit Offset ", tcpa->server.config_addr.register_bit_offset);
+ fwts_log_info_simp_int(fw, " Access Size ", tcpa->server.config_addr.access_width);
+ fwts_log_info_simp_int(fw, " Address ", tcpa->server.config_addr.address);
+ fwts_log_info_simp_int(fw, " PCI Segment Group: ", tcpa->server.pci_seg_number);
+ fwts_log_info_simp_int(fw, " PCI Bus: ", tcpa->server.pci_bus_number);
+ fwts_log_info_simp_int(fw, " PCI Device: ", tcpa->server.pci_dev_number);
+ fwts_log_info_simp_int(fw, " PCI Function: ", tcpa->server.pci_func_number);
fwts_acpi_reserved_zero_check(fw, "TCPA", "Reserved", tcpa->server.reserved, sizeof(tcpa->server.reserved), &passed);
fwts_acpi_reserved_zero_check(fw, "TCPA", "Reserved2", reserved2, sizeof(reserved2), &passed);
diff --git a/src/acpi/tpm2/tpm2.c b/src/acpi/tpm2/tpm2.c
index ab7a87e8..d9924797 100644
--- a/src/acpi/tpm2/tpm2.c
+++ b/src/acpi/tpm2/tpm2.c
@@ -36,10 +36,10 @@ static int tpm2_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "TPM2 Table:");
- fwts_log_info_verbatim(fw, " Platform Class: 0x%4.4" PRIx16, tpm2->platform_class);
- fwts_log_info_verbatim(fw, " Reserved: 0x%4.4" PRIx32, tpm2->reserved);
- fwts_log_info_verbatim(fw, " Address of Control Area: 0x%16.16" PRIx64, tpm2->address_of_control_area);
- fwts_log_info_verbatim(fw, " Start Method: 0x%8.8" PRIx32, tpm2->start_method);
+ fwts_log_info_simp_int(fw, " Platform Class: ", tpm2->platform_class);
+ fwts_log_info_simp_int(fw, " Reserved: ", tpm2->reserved);
+ fwts_log_info_simp_int(fw, " Address of Control Area: ", tpm2->address_of_control_area);
+ fwts_log_info_simp_int(fw, " Start Method: ", tpm2->start_method);
if (tpm2->platform_class != 0 && tpm2->platform_class != 1) {
passed = false;
diff --git a/src/acpi/uefi/uefi.c b/src/acpi/uefi/uefi.c
index abf11567..e25429f1 100644
--- a/src/acpi/uefi/uefi.c
+++ b/src/acpi/uefi/uefi.c
@@ -58,7 +58,7 @@ static int uefi_test1(fwts_framework *fw)
fwts_log_info_verbatim(fw, "UEFI ACPI Data Table:");
fwts_log_info_verbatim(fw, " Identifier: %s", guid);
- fwts_log_info_verbatim(fw, " DataOffset: 0x%4.4" PRIx16, uefi->dataoffset);
+ fwts_log_info_simp_int(fw, " DataOffset: ", uefi->dataoffset);
/* Sanity check the dataoffset */
if (uefi->dataoffset > table->length) {
@@ -84,8 +84,8 @@ static int uefi_test1(fwts_framework *fw)
, uefi_smmcomm->boot.dataoffset);
}
- fwts_log_info_verbatim(fw, " SW SMI Number: 0x%8.8" PRIx32, uefi_smmcomm->sw_smi_number);
- fwts_log_info_verbatim(fw, " Buffer Ptr Address: 0x%16.16" PRIx64, uefi_smmcomm->buf_ptr_addr);
+ fwts_log_info_simp_int(fw, " SW SMI Number: ", uefi_smmcomm->sw_smi_number);
+ fwts_log_info_simp_int(fw, " Buffer Ptr Address: ", uefi_smmcomm->buf_ptr_addr);
} else {
/* dump the remaining data */
fwts_log_info_verbatim(fw, " Data:");
diff --git a/src/acpi/waet/waet.c b/src/acpi/waet/waet.c
index cfde0c5a..8da30cb1 100644
--- a/src/acpi/waet/waet.c
+++ b/src/acpi/waet/waet.c
@@ -48,7 +48,7 @@ static int waet_test1(fwts_framework *fw)
}
fwts_log_info_verbatim(fw, "WAET Table:");
- fwts_log_info_verbatim(fw, " Emulated Device Flags: 0x%8.8" PRIx32, waet->flags);
+ fwts_log_info_simp_int(fw, " Emulated Device Flags: ", waet->flags);
fwts_log_info_verbatim(fw, " Bit [0] RTC Good: %1" PRIu32, waet->flags & 1);
fwts_log_info_verbatim(fw, " Bit [1] PM Timer Good: %1" PRIu32, (waet->flags >> 1) & 1);
fwts_log_nl(fw);
diff --git a/src/acpi/wpbt/wpbt.c b/src/acpi/wpbt/wpbt.c
index 413eba2e..f12882e8 100644
--- a/src/acpi/wpbt/wpbt.c
+++ b/src/acpi/wpbt/wpbt.c
@@ -39,10 +39,10 @@ static int wpbt_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "WPBT Windows Platform Binary Table:");
- fwts_log_info_verbatim(fw, " Handoff Memory Size: 0x%8.8" PRIx32, wpbt->handoff_size);
- fwts_log_info_verbatim(fw, " Handoff Memory Location: 0x%16.16" PRIx64, wpbt->handoff_address);
- fwts_log_info_verbatim(fw, " Content Layout: 0x%2.2" PRIx8, wpbt->layout);
- fwts_log_info_verbatim(fw, " Content Type: 0x%2.2" PRIx8, wpbt->type);
+ fwts_log_info_simp_int(fw, " Handoff Memory Size: ", wpbt->handoff_size);
+ fwts_log_info_simp_int(fw, " Handoff Memory Location: ", wpbt->handoff_address);
+ fwts_log_info_simp_int(fw, " Content Layout: ", wpbt->layout);
+ fwts_log_info_simp_int(fw, " Content Type: ", wpbt->type);
fwts_acpi_fixed_value_check(fw, LOG_LEVEL_HIGH, "WPBT", "Layout", wpbt->layout, 1, &passed);
@@ -50,7 +50,7 @@ static int wpbt_test1(fwts_framework *fw)
fwts_acpi_fixed_value_check(fw, LOG_LEVEL_HIGH, "WPBT", "Type", wpbt->type, 1, &passed);
else {
fwts_acpi_table_wpbt_type1 *type = (fwts_acpi_table_wpbt_type1 *) (table->data + sizeof(fwts_acpi_table_wpbt));
- fwts_log_info_verbatim(fw, " Arguments Length: 0x%4.4" PRIx16, type->arguments_length);
+ fwts_log_info_simp_int(fw, " Arguments Length: ", type->arguments_length);
if (type->arguments_length % 2) {
passed = false;
diff --git a/src/acpi/wsmt/wsmt.c b/src/acpi/wsmt/wsmt.c
index a5e9ba71..573c13d1 100644
--- a/src/acpi/wsmt/wsmt.c
+++ b/src/acpi/wsmt/wsmt.c
@@ -39,7 +39,7 @@ static int wsmt_test1(fwts_framework *fw)
bool passed = true;
fwts_log_info_verbatim(fw, "WSMT Windows SMM Security Mitigations Table:");
- fwts_log_info_verbatim(fw, " Protection Flags: 0x%8.8" PRIx32, wsmt->protection_flags);
+ fwts_log_info_simp_int(fw, " Protection Flags: ", wsmt->protection_flags);
fwts_acpi_reserved_bits_check(fw, "WSMT", "Protection Flags", wsmt->protection_flags, sizeof(wsmt->protection_flags), 3, 31, &passed);
diff --git a/src/acpi/xenv/xenv.c b/src/acpi/xenv/xenv.c
index e92cf85d..fc558f36 100644
--- a/src/acpi/xenv/xenv.c
+++ b/src/acpi/xenv/xenv.c
@@ -46,10 +46,10 @@ static int xenv_test1(fwts_framework *fw)
fwts_acpi_revision_check("XENV", xenv->header.revision, 1, &passed);
fwts_log_info_verbatim(fw, "XENV Table:");
- fwts_log_info_verbatim(fw, " GNT Start Address: 0x%16.16" PRIx64, xenv->gnt_start);
- fwts_log_info_verbatim(fw, " GNT Size: 0x%16.16" PRIx64, xenv->gnt_size);
- fwts_log_info_verbatim(fw, " Evtchn Intr: 0x%8.8" PRIx32, xenv->evtchn_intr);
- fwts_log_info_verbatim(fw, " Evtchn Intr Flags: 0x%2.2" PRIx8, xenv->evtchn_intr_flags);
+ fwts_log_info_simp_int(fw, " GNT Start Address: ", xenv->gnt_start);
+ fwts_log_info_simp_int(fw, " GNT Size: ", xenv->gnt_size);
+ fwts_log_info_simp_int(fw, " Evtchn Intr: ", xenv->evtchn_intr);
+ fwts_log_info_simp_int(fw, " Evtchn Intr Flags: ", xenv->evtchn_intr_flags);
fwts_acpi_reserved_bits_check(fw, "XENV", "Evtchn Intr Flags", xenv->evtchn_intr_flags, sizeof(xenv->evtchn_intr_flags), 2, 7, &passed);
diff --git a/src/dmi/dmicheck/dmicheck.c b/src/dmi/dmicheck/dmicheck.c
index 86d64457..c197eb53 100644
--- a/src/dmi/dmicheck/dmicheck.c
+++ b/src/dmi/dmicheck/dmicheck.c
@@ -450,12 +450,12 @@ static void dmi_dump_entry(fwts_framework *fw, fwts_smbios_entry *entry, fwts_sm
if (type == FWTS_SMBIOS) {
fwts_log_info_verbatim(fw, "SMBIOS Entry Point Structure:");
fwts_log_info_verbatim(fw, " Anchor String : %4.4s", entry->signature);
- fwts_log_info_verbatim(fw, " Checksum : 0x%2.2x", entry->checksum);
- fwts_log_info_verbatim(fw, " Entry Point Length : 0x%2.2x", entry->length);
- fwts_log_info_verbatim(fw, " Major Version : 0x%2.2x", entry->major_version);
- fwts_log_info_verbatim(fw, " Minor Version : 0x%2.2x", entry->minor_version);
- fwts_log_info_verbatim(fw, " Maximum Struct Size : 0x%2.2x", entry->max_struct_size);
- fwts_log_info_verbatim(fw, " Entry Point Revision : 0x%2.2x", entry->revision);
+ fwts_log_info_simp_int(fw, " Checksum : ", entry->checksum);
+ fwts_log_info_simp_int(fw, " Entry Point Length : ", entry->length);
+ fwts_log_info_simp_int(fw, " Major Version : ", entry->major_version);
+ fwts_log_info_simp_int(fw, " Minor Version : ", entry->minor_version);
+ fwts_log_info_simp_int(fw, " Maximum Struct Size : ", entry->max_struct_size);
+ fwts_log_info_simp_int(fw, " Entry Point Revision : ", entry->revision);
fwts_log_info_verbatim(fw, " Formatted Area : 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x",
entry->formatted_area[0], entry->formatted_area[1],
entry->formatted_area[2], entry->formatted_area[3],
@@ -466,10 +466,10 @@ static void dmi_dump_entry(fwts_framework *fw, fwts_smbios_entry *entry, fwts_sm
/* Common to SMBIOS and SMBIOS_DMI_LEGACY */
fwts_log_info_verbatim(fw, " Intermediate Anchor : %5.5s", (char *)entry->anchor_string);
- fwts_log_info_verbatim(fw, " Intermediate Checksum : 0x%2.2x", entry->intermediate_checksum);
- fwts_log_info_verbatim(fw, " Structure Table Length : 0x%4.4x", entry->struct_table_length);
- fwts_log_info_verbatim(fw, " Structure Table Address: 0x%8.8x", entry->struct_table_address);
- fwts_log_info_verbatim(fw, " # of SMBIOS Structures : 0x%4.4x", entry->number_smbios_structures);
+ fwts_log_info_simp_int(fw, " Intermediate Checksum : ", entry->intermediate_checksum);
+ fwts_log_info_simp_int(fw, " Structure Table Length : ", entry->struct_table_length);
+ fwts_log_info_simp_int(fw, " Structure Table Address: ", entry->struct_table_address);
+ fwts_log_info_simp_int(fw, " # of SMBIOS Structures : ", entry->number_smbios_structures);
fwts_log_info_verbatim(fw, " SMBIOS BCD Revision : %2.2x", entry->smbios_bcd_revision);
if (entry->smbios_bcd_revision == 0)
fwts_log_info_verbatim(fw, " BCD Revision 00 indicates compliance with specification stated in Major/Minor Version.");
@@ -480,15 +480,15 @@ static void dmi_dump_entry30(fwts_framework *fw, fwts_smbios30_entry *entry)
fwts_log_info_verbatim(fw, "SMBIOS30 Entry Point Structure:");
fwts_log_info_verbatim(fw, " Anchor String : %5.5s", entry->signature);
- fwts_log_info_verbatim(fw, " Checksum : 0x%2.2" PRIx8, entry->checksum);
- fwts_log_info_verbatim(fw, " Entry Point Length : 0x%2.2" PRIx8, entry->length);
- fwts_log_info_verbatim(fw, " Major Version : 0x%2.2" PRIx8, entry->major_version);
- fwts_log_info_verbatim(fw, " Minor Version : 0x%2.2" PRIx8, entry->minor_version);
- fwts_log_info_verbatim(fw, " Docrev : 0x%2.2" PRIx8, entry->docrev);
- fwts_log_info_verbatim(fw, " Entry Point Revision : 0x%2.2" PRIx8, entry->revision);
- fwts_log_info_verbatim(fw, " Reserved : 0x%2.2" PRIx8, entry->reserved);
- fwts_log_info_verbatim(fw, " Table maximum size : 0x%8.8" PRIx32, entry->struct_table_max_size);
- fwts_log_info_verbatim(fw, " Table address : 0x%16.16" PRIx64, entry->struct_table_address);
+ fwts_log_info_simp_int(fw, " Checksum : ", entry->checksum);
+ fwts_log_info_simp_int(fw, " Entry Point Length : ", entry->length);
+ fwts_log_info_simp_int(fw, " Major Version : ", entry->major_version);
+ fwts_log_info_simp_int(fw, " Minor Version : ", entry->minor_version);
+ fwts_log_info_simp_int(fw, " Docrev : ", entry->docrev);
+ fwts_log_info_simp_int(fw, " Entry Point Revision : ", entry->revision);
+ fwts_log_info_simp_int(fw, " Reserved : ", entry->reserved);
+ fwts_log_info_simp_int(fw, " Table maximum size : ", entry->struct_table_max_size);
+ fwts_log_info_simp_int(fw, " Table address : ", entry->struct_table_address);
}
diff --git a/src/lib/include/fwts_log.h b/src/lib/include/fwts_log.h
index 8ad12a8c..ea5bd60f 100644
--- a/src/lib/include/fwts_log.h
+++ b/src/lib/include/fwts_log.h
@@ -146,6 +146,7 @@ void fwts_log_section_begin(fwts_log *log, const char *name);
void fwts_log_section_end(fwts_log *log);
char *fwts_log_get_filenames(const char *filename, const fwts_log_type type);
fwts_log_filename_type fwts_log_get_filename_type(const char *name);
+void _fwts_log_info_simp_int(const fwts_framework *fw, const char *message, uint8_t size, uint64_t value);
static inline int fwts_log_type_count(fwts_log_type type)
{
@@ -188,4 +189,7 @@ static inline int fwts_log_type_count(fwts_log_type type)
#define fwts_log_nl(fw) \
fwts_log_printf(fw, LOG_NEWLINE, LOG_LEVEL_NONE, "", "", "", "%s", "")
+#define fwts_log_info_simp_int(fw, message, value) \
+ _fwts_log_info_simp_int(fw, message, sizeof(value), value)
+
#endif
diff --git a/src/lib/src/fwts_log.c b/src/lib/src/fwts_log.c
index d4dc9eac..2ccc649b 100644
--- a/src/lib/src/fwts_log.c
+++ b/src/lib/src/fwts_log.c
@@ -443,6 +443,33 @@ int fwts_log_printf(
return ret;
}
+
+/*
+ * _fwts_log_info_simp_int()
+ * simplify printing integers with different sizes
+ */
+void _fwts_log_info_simp_int(
+ const fwts_framework *fw,
+ const char *message,
+ uint8_t size,
+ uint64_t value)
+{
+ switch (size) {
+ case sizeof(uint8_t):
+ fwts_log_info_verbatim(fw, "%s0x%2.2" PRIx8, message, (uint8_t)value);
+ break;
+ case sizeof(uint16_t):
+ fwts_log_info_verbatim(fw, "%s0x%4.4" PRIx16, message, (uint16_t)value);
+ break;
+ case sizeof(uint32_t):
+ fwts_log_info_verbatim(fw, "%s0x%8.8" PRIx32, message, (uint32_t)value);
+ break;
+ case sizeof(uint64_t):
+ fwts_log_info_verbatim(fw, "%s0x%16.16" PRIx64, message, value);
+ break;
+ }
+}
+
/*
* fwts_log_underline()
* write an underline across log, using character ch as the underline
--
2.25.1
More information about the fwts-devel
mailing list