[PATCH] Add support for Hygon Dhyana CPU

[fanjinke]

Hello All,

To support some case (mtrr,msr,virt,etc.) run at Hygon Dhyana CPU,
add Hygon CPU Vendor ID check and then reuse AMD code paths.

Background:
Chengdu Haiguang IC Design Co., Ltd (Hygon) is a Joint Venture between
AMD and Haiguang Information Technology Co.,Ltd., aims at providing high
performance x86 processor for China server market. Its first generation
processor codename is Dhyana, which originates from AMD technology and
shares most of the architecture with AMD's family 17h, but with different
CPU Vendor ID("HygonGenuine")/Family series number(Family 18h).

Related Hygon kernel patch can be found on
http://lkml.kernel.org/r/5ce86123a7b9dad925ac583d88d2f921040e859b.1538583282.git.puwen@hygon.cn

The result of fwts:

before patched:
---------------+-----+-----+-----+-----+-----+-----+
Total:         | 2042|   81|    1|   43|  483|   11|
---------------+-----+-----+-----+-----+-----+-----+

after patched:
---------------+-----+-----+-----+-----+-----+-----+
Total:         | 2094|   73|    1|   42|  481|   11|
---------------+-----+-----+-----+-----+-----+-----+

Please help me with the commit process.
Thank you very much!

Signed-off-by: fanjinke <fanjinke at hygon.cn>
---
 src/bios/mtrr/mtrr.c       |  4 ++--
 src/cpu/msr/msr.c          |  4 +++-
 src/cpu/virt/virt.c        |  3 ++-
 src/lib/include/fwts_cpu.h |  1 +
 src/lib/src/fwts_cpu.c     | 10 ++++++++--
 5 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/bios/mtrr/mtrr.c b/src/bios/mtrr/mtrr.c
index b2576bf0..54b0d852 100644
--- a/src/bios/mtrr/mtrr.c
+++ b/src/bios/mtrr/mtrr.c
@@ -191,7 +191,7 @@ static int get_default_mtrr(fwts_framework *fw)
 	/* Get the default memory type of memory between 4GB and second top of
 	 * memory (TOM2) - i.e. is it write back (WB)
 	 */
-	if (strstr(fwts_cpuinfo->vendor_id, "AMD")) {
+	if (strstr(fwts_cpuinfo->vendor_id, "AMD") || strstr(fwts_cpuinfo->vendor_id, "Hygon")) {
 		if (fwts_cpu_readmsr(fw, 0, AMD_SYS_CFG_MSR, &amd_sys_conf) == FWTS_OK)
 			if (amd_sys_conf & 0x200000)
 				amd_Tom2ForceMemTypeWB = true;
@@ -633,7 +633,7 @@ static int mtrr_test3(fwts_framework *fw)
 		fwts_log_error(fw, "Cannot get CPU vendor_id");
 		return FWTS_ERROR;
 	}
-	if (strstr(fwts_cpuinfo->vendor_id, "AMD")) {
+	if (strstr(fwts_cpuinfo->vendor_id, "AMD") || strstr(fwts_cpuinfo->vendor_id, "Hygon")) {
 		if (klog != NULL) {
 			if (fwts_klog_regex_find(fw, klog, "SYSCFG[MtrrFixDramModEn] not cleared by BIOS, clearing this bit") > 0)
 				fwts_failed(fw, LOG_LEVEL_MEDIUM,
diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
index d655963e..69fd80c8 100644
--- a/src/cpu/msr/msr.c
+++ b/src/cpu/msr/msr.c
@@ -27,6 +27,7 @@ typedef void (*msr_callback_check)(fwts_framework *fw, const uint64_t val);
 static int ncpus;
 static bool intel_cpu;
 static bool amd_cpu;
+static bool hygon_cpu;
 static fwts_cpuinfo_x86 *cpuinfo;
 
 static int msr_init(fwts_framework *fw)
@@ -43,6 +44,7 @@ static int msr_init(fwts_framework *fw)
 	}
 	intel_cpu = strstr(cpuinfo->vendor_id, "Intel") != NULL;
 	amd_cpu = strstr(cpuinfo->vendor_id, "AuthenticAMD") != NULL;
+	hygon_cpu = strstr(cpuinfo->vendor_id, "HygonGenuine") != NULL;
 
 	if ((ncpus = fwts_cpu_enumerate()) == FWTS_ERROR) {
 		fwts_log_error(fw, "Cannot detect the number of CPUs on this machine.");
@@ -708,7 +710,7 @@ static int msr_cpu_generic(fwts_framework *fw)
 {
 	if (intel_cpu)
 		msr_table_check(fw, IA32_MSRs);
-	else if (amd_cpu)
+	else if (amd_cpu || hygon_cpu)
 		msr_table_check(fw, AMD_MSRs);
 	else
 		fwts_skipped(fw, "Not an AMD or Intel CPU, test skipped.");
diff --git a/src/cpu/virt/virt.c b/src/cpu/virt/virt.c
index 871b2ada..9a5759c6 100644
--- a/src/cpu/virt/virt.c
+++ b/src/cpu/virt/virt.c
@@ -73,7 +73,8 @@ static int virt_deinit(fwts_framework *fw)
 
 static int virt_test1(fwts_framework *fw)
 {
-	if (strstr(fwts_virt_cpuinfo->vendor_id, "AMD") != NULL) {
+	if (strstr(fwts_virt_cpuinfo->vendor_id, "AMD") != NULL ||
+	    strstr(fwts_virt_cpuinfo->vendor_id, "Hygon") != NULL) {
 		virt_check_svm(fw);
 	} else if (strstr(fwts_virt_cpuinfo->vendor_id, "Intel") != NULL) {
 		virt_check_vmx(fw);
diff --git a/src/lib/include/fwts_cpu.h b/src/lib/include/fwts_cpu.h
index 1916b6c5..ead5a92c 100644
--- a/src/lib/include/fwts_cpu.h
+++ b/src/lib/include/fwts_cpu.h
@@ -61,6 +61,7 @@ int fwts_cpu_readmsr(fwts_framework *fw, const int cpu, const uint32_t reg, uint
 
 int fwts_cpu_is_Intel(bool *is_intel);
 int fwts_cpu_is_AMD(bool *is_amd);
+int fwts_cpu_is_Hygon(bool *is_hygon);
 
 int fwts_cpu_has_c1e(void);
 fwts_cpuinfo_x86 *fwts_cpu_get_info(const int which_cpu);
diff --git a/src/lib/src/fwts_cpu.c b/src/lib/src/fwts_cpu.c
index f14a1f9f..e866d1dc 100644
--- a/src/lib/src/fwts_cpu.c
+++ b/src/lib/src/fwts_cpu.c
@@ -214,6 +214,11 @@ int fwts_cpu_is_AMD(bool *is_amd)
 	return fwts_cpu_matches_vendor_id("AuthenticAMD", is_amd);
 }
 
+int fwts_cpu_is_Hygon(bool *is_hygon)
+{
+	return fwts_cpu_matches_vendor_id("HygonGenuine", is_hygon);
+}
+
 /*
  *  fwts_cpu_has_c1e()
  *	check if CPU has C1E bit
@@ -237,8 +242,9 @@ fwts_bool fwts_cpu_has_c1e(void)
 		goto free_info;
 	}
 
-	/* no C1E on AMD */
-        if (strstr(cpu->vendor_id, "AuthenticAMD") == NULL) {
+	/* no C1E on AMD and Hygon */
+	if (strstr(cpu->vendor_id, "AuthenticAMD") == NULL &&
+	    strstr(cpu->vendor_id, "HygonGenuine") == NULL ) {
 		rc = FWTS_FALSE;
 		goto free_info;
 	}
-- 
2.17.1