ACK: [PATCH 1/5] cpu/msr: add MSR_PMG_IO_CAPTURE_BASE to IA32_silvermont_MSRs
ivanhu
ivan.hu at canonical.com
Wed Jul 24 08:02:25 UTC 2019
On 7/12/19 1:08 PM, Alex Hung wrote:
> BIT definition is as below:
>
> 15:0 LVL_2 Base Address (R/W)
> 18:16 C-state Range (R/W)
> 63:19 Reserved
>
> Signed-off-by: Alex Hung <alex.hung at canonical.com>
> ---
> src/cpu/msr/msr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 3a35d3d5..e694c65d 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -481,6 +481,7 @@ static const msr_info IA32_atom_MSRs[] = {
> };
>
> static const msr_info IA32_silvermont_MSRs[] = {
> + { "MSR_PMG_IO_CAPTURE_BASE", 0x000000e4, 0x000000000007ffffULL, NULL },
> { NULL, 0x00000000, 0, NULL },
> };
>
>
Acked-by: Ivan Hu <ivan.hu at canonical.com>
More information about the fwts-devel
mailing list