ACK: [PATCH 2/2] dmi: dmicheck: check reserved bits of Type 7 offset 0xd

[Colin Ian King]

On 09/05/17 01:10, Alex Hung wrote:
> Bits[7:15] of Current SRAM Type Cache (offset 0xd) should be reserved.
> 
> Signed-off-by: Alex Hung <alex.hung at canonical.com>
> ---
>  src/dmi/dmicheck/dmicheck.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/src/dmi/dmicheck/dmicheck.c b/src/dmi/dmicheck/dmicheck.c
> index ca0b3f6..f7c02f3 100644
> --- a/src/dmi/dmicheck/dmicheck.c
> +++ b/src/dmi/dmicheck/dmicheck.c
> @@ -1194,6 +1194,13 @@ static void dmicheck_entry(fwts_framework *fw,
>  					"0x%8.8" PRIx32 ", field '%s', offset 0x%2.2x",
>  					GET_UINT16(data + 0x05),
>  					table, addr, "Cache Location", 0x5);
> +			if (GET_UINT16(data + 0x0d) >> 7)
> +				fwts_failed(fw, LOG_LEVEL_MEDIUM, DMI_RESERVED_VALUE_USED,
> +					"Reserved bits 0x%4.4" PRIx16 " was used and "
> +					"bits 7..15 should be reserved while accessing entry '%s' @ "
> +					"0x%8.8" PRIx32 ", field '%s', offset 0x%2.2x",
> +					GET_UINT16(data + 0x0d),
> +					table, addr, "Current SRAM Type", 0x0d);
>  			if (hdr->length < 0x13)
>  				break;
>  			dmi_min_max_uint8_check(fw, table, addr, "Error Correction Type", hdr, 0x10, 0x1, 0x6);
> 
Acked-by: Colin Ian King <colin.king at canonical.com>