[PATCH 1/2] dmi: dmicheck: check reserved bits of Type 7 offset 0x5
Alex Hung
alex.hung at canonical.com
Tue May 9 00:10:29 UTC 2017
Bits[10:15] of Cache Configuration (offset 0x5) should be reserved.
Signed-off-by: Alex Hung <alex.hung at canonical.com>
---
src/dmi/dmicheck/dmicheck.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/dmi/dmicheck/dmicheck.c b/src/dmi/dmicheck/dmicheck.c
index a85a17a..ca0b3f6 100644
--- a/src/dmi/dmicheck/dmicheck.c
+++ b/src/dmi/dmicheck/dmicheck.c
@@ -1187,6 +1187,13 @@ static void dmicheck_entry(fwts_framework *fw,
"0x%8.8" PRIx32 ", field '%s', offset 0x%2.2x",
GET_UINT16(data + 0x05),
table, addr, "Cache Location", 0x5);
+ if (GET_UINT16(data + 0x05) >> 10)
+ fwts_failed(fw, LOG_LEVEL_MEDIUM, DMI_RESERVED_VALUE_USED,
+ "Reserved bits 0x%4.4" PRIx16 " was used and "
+ "bits 10..15 should be reserved while accessing entry '%s' @ "
+ "0x%8.8" PRIx32 ", field '%s', offset 0x%2.2x",
+ GET_UINT16(data + 0x05),
+ table, addr, "Cache Location", 0x5);
if (hdr->length < 0x13)
break;
dmi_min_max_uint8_check(fw, table, addr, "Error Correction Type", hdr, 0x10, 0x1, 0x6);
--
2.7.4
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