[PATCH 2/3] acpi: spcr: sbbr: IOAPIC is valid interrupt type

Sakar Arora sakar.arora at arm.com
Mon Dec 18 18:28:30 UTC 2017


SBBR spec requires SPCR table to describe GSIV based
interrupt number for UART.
Some ARM server implementations set interrupt
type as IOAPIC, which is a valid type for GSIV
based interrupt.

Signed-off-by: Sakar Arora <sakar.arora at arm.com>
---
 src/acpi/spcr/spcr.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/acpi/spcr/spcr.c b/src/acpi/spcr/spcr.c
index 2f37e3f..740d569 100644
--- a/src/acpi/spcr/spcr.c
+++ b/src/acpi/spcr/spcr.c
@@ -74,9 +74,11 @@ static int spcr_sbbr_gsiv_test(fwts_framework *fw)
 {
 	if (fw->flags & FWTS_FLAG_TEST_SBBR) {
 		const uint8_t ARMH_GIC_INTR_MASK = 0x08;
+		const uint8_t IO_APIC_INTR_MASK = 0x02;
 
-		if ( (spcr->interrupt_type == ARMH_GIC_INTR_MASK) &&
-		     (spcr->gsi            != 0x0000000000000000)    )
+		if ((spcr->interrupt_type == ARMH_GIC_INTR_MASK ||
+		     spcr->interrupt_type == IO_APIC_INTR_MASK) &&
+		     spcr->gsi != 0x0)
 			fwts_passed(fw, "SPCR appears to be populated with correct GSIV interrupt"
 						"routing information for ARM PL011 UART Device");
 		else
-- 
2.7.4




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