PCI config space sanity checking

[Alex Hung]

On 02/01/2012 12:54 AM, Colin Ian King wrote:
> Hi there,
>
> While discussing some boot speed issues with the kernel with Andy 
> Whitcroft we spotted that that the PCI config space is being set up by 
> the BIOS and this can be sub-optimally configuring things like the 
> SATA capabilities.
>
> For example, bit 27 in HBA Capabilities for SATA devices controls the 
> "Staggered Spin-up (SSS)" setting - this really makes sense on servers 
> and hence should be set to zero for netbooks, laptops etc.  However, 
> we observed it being incorrectly set on particular platform which can 
> only have one drive in it, so SSS makes no sense.
>
SSS looks very familiar. I recall that Intel's BIOS utility (selfcheck 
or selftest for Windows) checks this bit and it suggests a setting (I 
don't remember whether it was 1 or 0).

PS. Both Intel and AMD also have utilities that checks hardware 
registers - thought they make mistakes too.

I think it is a good idea to check hardware configuration but we will 
need to be careful. If fwts suggest different configuration from 
hardware vendors (i.e. Intel, AMD and nVidia), it will cause confusion.

> So, perhaps we should add this to the next round of fwts blueprints - 
> check for incorrect or sub-optimal incorrectly configured PCI config 
> space settings for wide range of devices.
>
> Any thoughts?
>
> Colin
>
>
>